A new method for determination of the fixed charge density at the buried oxide/underlying substrate interface in SOI MOSFETs (1997)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Subjects: MICROELETRÔNICA; CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 1997
- Source:
- Conference titles: Symposium Silicon-on-Insulator Technology and Devices
-
ABNT
PAVANELLO, Marcelo Antonio e MARTINO, João Antonio. A new method for determination of the fixed charge density at the buried oxide/underlying substrate interface in SOI MOSFETs. Proceedings 3. Symposium on Silicon-on-Insulator Technology and Devices. Tradução . Pennington: The Electrochemical Society, 1997. . . Acesso em: 02 abr. 2026. -
APA
Pavanello, M. A., & Martino, J. A. (1997). A new method for determination of the fixed charge density at the buried oxide/underlying substrate interface in SOI MOSFETs. In Proceedings 3. Symposium on Silicon-on-Insulator Technology and Devices. Pennington: The Electrochemical Society. -
NLM
Pavanello MA, Martino JA. A new method for determination of the fixed charge density at the buried oxide/underlying substrate interface in SOI MOSFETs. In: Proceedings 3. Symposium on Silicon-on-Insulator Technology and Devices. Pennington: The Electrochemical Society; 1997. [citado 2026 abr. 02 ] -
Vancouver
Pavanello MA, Martino JA. A new method for determination of the fixed charge density at the buried oxide/underlying substrate interface in SOI MOSFETs. In: Proceedings 3. Symposium on Silicon-on-Insulator Technology and Devices. Pennington: The Electrochemical Society; 1997. [citado 2026 abr. 02 ] - Impact of TiN metal gate thickness and the HsSiO nitridation on MuGFETs electrical performance
- Caracterização elétrica de dispositivos SOI MOS em baixa temperatura
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Combined l and series resistance extraction of ldd mosfets
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- The impact of gate length scaling on UTBOX FDSOI devices: the digital/analog performance of extension-less structures
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Transistor soi-nmosfet nao auto-alinhado
- Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs
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