Understanding and optimizing the floating body retention in FDSOI UTBOX (2016)
- Authors:
- Autor USP: MARTINO, JOÃO ANTONIO - EP
- Unidade: EP
- DOI: 10.1016/j.sse.2015.11.021
- Assunto: TRANSISTORES
- Language: Inglês
- Source:
- Título: Solid-State Electronics
- Volume/Número/Paginação/Ano: v. 117, p. 123-129, March 2016
- Este periódico é de acesso aberto
- Este artigo NÃO é de acesso aberto
-
ABNT
AOULAICHE, Marc et al. Understanding and optimizing the floating body retention in FDSOI UTBOX. Solid-State Electronics, v. 117, p. 123-129, 2016Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2015.11.021. Acesso em: 20 jan. 2026. -
APA
Aoulaiche, M., Bourdelle, K. K., Witters, L. J., Caillat, C., Simoen, E., & Martino, J. A. (2016). Understanding and optimizing the floating body retention in FDSOI UTBOX. Solid-State Electronics, 117, 123-129. doi:10.1016/j.sse.2015.11.021 -
NLM
Aoulaiche M, Bourdelle KK, Witters LJ, Caillat C, Simoen E, Martino JA. Understanding and optimizing the floating body retention in FDSOI UTBOX [Internet]. Solid-State Electronics. 2016 ; 117 123-129.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2015.11.021 -
Vancouver
Aoulaiche M, Bourdelle KK, Witters LJ, Caillat C, Simoen E, Martino JA. Understanding and optimizing the floating body retention in FDSOI UTBOX [Internet]. Solid-State Electronics. 2016 ; 117 123-129.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2015.11.021 - Analog performance and application of graded-channel fully depleted SOI MOSFETs
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- Projeto de processos de fabricação avançados aplicáveis nas tecnologias CMOS micrométricas
- Simple method to determine the poly gate doping concentration based on poly depletion effect
- A new technique to extract the oxide charge density at front and back interfaces of SOI nMOSFETs devices
- Influence of the gate oxide tunneling effect on the extraction of the silicon film and front oxide thickness in SOI nMOSFET
- A study of total series resistance and effective channel length comparing SOI nMOSFET and GC SOI nMOSFET in saturation region
- A simple method to model nonrectangular-gate layout in SOI MOSFETs
- New leakage drain current model for high temperature soi mesfet
- Influence of the substrate potential drop on fully depleted soi mesfet threshold voltage at 77k
Informações sobre o DOI: 10.1016/j.sse.2015.11.021 (Fonte: oaDOI API)
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