A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction (1997)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Source:
- Título: Journal of Solid-State Devices and Circuits
- ISSN: 0104-9631
- Volume/Número/Paginação/Ano: v.5, n.1, p.5-8, February 1997
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ABNT
NICOLETT, Aparecido Sirley e MARTINO, João Antonio. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, v. 5, n. 1, p. 5-8, 1997Tradução . . Acesso em: 11 mar. 2026. -
APA
Nicolett, A. S., & Martino, J. A. (1997). A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, 5( 1), 5-8. -
NLM
Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2026 mar. 11 ] -
Vancouver
Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2026 mar. 11 ] - Impact of TiN metal gate thickness and the HsSiO nitridation on MuGFETs electrical performance
- Caracterização elétrica de dispositivos SOI MOS em baixa temperatura
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Combined l and series resistance extraction of ldd mosfets
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- The impact of gate length scaling on UTBOX FDSOI devices: the digital/analog performance of extension-less structures
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Transistor soi-nmosfet nao auto-alinhado
- Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs
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