A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction (1997)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Source:
- Título: Journal of Solid-State Devices and Circuits
- ISSN: 0104-9631
- Volume/Número/Paginação/Ano: v.5, n.1, p.5-8, February 1997
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ABNT
NICOLETT, Aparecido Sirley e MARTINO, João Antonio. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, v. 5, n. 1, p. 5-8, 1997Tradução . . Acesso em: 05 out. 2024. -
APA
Nicolett, A. S., & Martino, J. A. (1997). A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, 5( 1), 5-8. -
NLM
Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2024 out. 05 ] -
Vancouver
Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2024 out. 05 ] - Temperature influences on the drain leakage current behavior in graded-channel SOI nMOSFETs
- Projeto de processos de fabricação avançados aplicáveis nas tecnologias CMOS micrométricas
- Analysis of the linear kink effect in partially depleted SOI nMOSFETs
- Simple method to extract the length dependent mobility degradation factor at 77 K
- Mobility degradation influence on the SOI MOSFET channel length extraction at 77K
- Low temperature and channel engineering influence on harmonic distortion of soi nmosfets for analog applications
- Analysis of the capacitance vs. voltage in graded channel SOI capacitor
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Transistor soi-nmosfet nao auto-alinhado
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