Influence of the back gate voltage on the total series resistance of fully depleted SOI MOSFETs at 300 K and 77 K (2002)
- Authors:
- Autor USP: MARTINO, JOÃO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2002
- Source:
- Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO
-
ABNT
NICOLETT, Aparecido Sirley et al. Influence of the back gate voltage on the total series resistance of fully depleted SOI MOSFETs at 300 K and 77 K. Microelectronics Technology and Devices SBMICRO 2002. Tradução . Pennington: The Electrochemical Society, 2002. . . Acesso em: 13 mar. 2026. -
APA
Nicolett, A. S., Martino, J. A., Simoen, E., & Claeys, C. (2002). Influence of the back gate voltage on the total series resistance of fully depleted SOI MOSFETs at 300 K and 77 K. In Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society. -
NLM
Nicolett AS, Martino JA, Simoen E, Claeys C. Influence of the back gate voltage on the total series resistance of fully depleted SOI MOSFETs at 300 K and 77 K. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. [citado 2026 mar. 13 ] -
Vancouver
Nicolett AS, Martino JA, Simoen E, Claeys C. Influence of the back gate voltage on the total series resistance of fully depleted SOI MOSFETs at 300 K and 77 K. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. [citado 2026 mar. 13 ] - Impact of TiN metal gate thickness and the HsSiO nitridation on MuGFETs electrical performance
- Caracterização elétrica de dispositivos SOI MOS em baixa temperatura
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Combined l and series resistance extraction of ldd mosfets
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- The impact of gate length scaling on UTBOX FDSOI devices: the digital/analog performance of extension-less structures
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Transistor soi-nmosfet nao auto-alinhado
- Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs
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