The graded-channel SOI NMOSFET and its potential to analog applications (1999)
- Authors:
- Autor USP: MARTINO, JOÃO ANTONIO - EP
- Unidade: EP
- Assunto: ENGENHARIA ELÉTRICA
- Language: Inglês
- Imprenta:
- Publisher: SBMicro/IMAPS
- Publisher place: São Paulo
- Date published: 1999
- Source:
- Título: ICMP 99 : Technical Digest
- Conference titles: International Conference on Microelectronics and Packaging
-
ABNT
PAVANELLO, Marcelo Antonio et al. The graded-channel SOI NMOSFET and its potential to analog applications. 1999, Anais.. São Paulo: SBMicro/IMAPS, 1999. . Acesso em: 11 mar. 2026. -
APA
Pavanello, M. A., Dessard, V., Flandre, D., & Martino, J. A. (1999). The graded-channel SOI NMOSFET and its potential to analog applications. In ICMP 99 : Technical Digest. São Paulo: SBMicro/IMAPS. -
NLM
Pavanello MA, Dessard V, Flandre D, Martino JA. The graded-channel SOI NMOSFET and its potential to analog applications. ICMP 99 : Technical Digest. 1999 ;[citado 2026 mar. 11 ] -
Vancouver
Pavanello MA, Dessard V, Flandre D, Martino JA. The graded-channel SOI NMOSFET and its potential to analog applications. ICMP 99 : Technical Digest. 1999 ;[citado 2026 mar. 11 ] - Impact of TiN metal gate thickness and the HsSiO nitridation on MuGFETs electrical performance
- Caracterização elétrica de dispositivos SOI MOS em baixa temperatura
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Combined l and series resistance extraction of ldd mosfets
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- The impact of gate length scaling on UTBOX FDSOI devices: the digital/analog performance of extension-less structures
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Transistor soi-nmosfet nao auto-alinhado
- Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs
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