Low frequency noise assessment in advanced UTBOX SOI n-channel MOSFETs (2013)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA (CONGRESSOS)
- Language: Inglês
- Imprenta:
- Publisher: Institut Superieur d'Électronique
- Publisher place: Paris
- Date published: 2013
- Source:
- Título: EUROSOI 2013
- Conference titles: European Workshop on Silicon on Insulator Technology, Devices and Circuits
-
ABNT
MARTINO, João Antonio et al. Low frequency noise assessment in advanced UTBOX SOI n-channel MOSFETs. 2013, Anais.. Paris: Institut Superieur d'Électronique, 2013. . Acesso em: 26 jan. 2026. -
APA
Martino, J. A., Strobel, V., Cretu, B., Santos, S. D. dos, Simoen, E., Routure, J. -M., et al. (2013). Low frequency noise assessment in advanced UTBOX SOI n-channel MOSFETs. In EUROSOI 2013. Paris: Institut Superieur d'Électronique. -
NLM
Martino JA, Strobel V, Cretu B, Santos SD dos, Simoen E, Routure J-M, Carin R, Aoulaiche M, Claeys C. Low frequency noise assessment in advanced UTBOX SOI n-channel MOSFETs. EUROSOI 2013. 2013 ;[citado 2026 jan. 26 ] -
Vancouver
Martino JA, Strobel V, Cretu B, Santos SD dos, Simoen E, Routure J-M, Carin R, Aoulaiche M, Claeys C. Low frequency noise assessment in advanced UTBOX SOI n-channel MOSFETs. EUROSOI 2013. 2013 ;[citado 2026 jan. 26 ] - Analog circuit design using graded-channel SOI NMOSFETs
- Extraction of the interface charge density at the silicon substrate interface in SOI MOSFET's at cryogenic temperatures
- Extraction of the interface and oxide charge density in silicon-on-insulator MOSFETs
- Projeto de um processo CMOS com cavidade dupla e dimensões de porta de 2 um
- Spike Anneal Peak Temperature Impact on 1T-DRAM Retention Time
- Advantages of different source/drain engineering on scaled UTBOX FDSOI nMOSFETs at high temperature operation
- Observation of the Two-Sided Read Window on UTBOX SOI 1T-DRAM: Measurement Setup, Numerical and Empirical Results
- Estudo comparativo de estruturas de fonte e dreno de transistores mos submicrometricos
- Comparison between low and high read bias in FB-RAM on UTBOX FDSOI devices
- Effective channel length and series resistence extraction error induced by the substrate in enhancement-mode SOI nMOSFETs
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