The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput (2000)
- Authors:
- USP affiliated authors: NOIJE, WILHELMUS ADRIANUS MARIA VAN - EP ; SOARES JUNIOR, JOAO NAVARRO - EP
- Unidade: EP
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Publisher: IEEE
- Publisher place: Los Alamitos
- Date published: 2000
- Source:
- Título: Proceedings
- Conference titles: Symposium on Integrated Circuits and Systems Design
-
ABNT
SOARES JUNIOR, João Navarro e VAN NOIJE, Wilhelmus Adrianus Maria. The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput. 2000, Anais.. Los Alamitos: IEEE, 2000. . Acesso em: 03 mar. 2026. -
APA
Soares Junior, J. N., & Van Noije, W. A. M. (2000). The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput. In Proceedings. Los Alamitos: IEEE. -
NLM
Soares Junior JN, Van Noije WAM. The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput. Proceedings. 2000 ;[citado 2026 mar. 03 ] -
Vancouver
Soares Junior JN, Van Noije WAM. The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput. Proceedings. 2000 ;[citado 2026 mar. 03 ] - Precise final state determination of mismatched cmos latches
- Analog circuits on sog gate arrays: an 100mhz 6-bit d / a converter
- Precise final state determination of cmos latches
- High speed cmos ecl-compatible input circuit
- Metodos de teste de conversores a / d e sua aplicacao em projeto
- Fully integrated cmos clock recovery at gbits / rates
- Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design
- Metastability behavior of mismatched CMOS flip-flops using state diagram analysis
- Recuperador de clock em estrutura gate array do tipo mar de transistores
- Conversores D/A de 6 bits desenvolvido em pre-difundido do tipo mar de transistores
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