Precise final state determination of cmos latches (1993)
- Authors:
- USP affiliated authors: SOARES JUNIOR, JOAO NAVARRO - EP ; NOIJE, WILHELMUS ADRIANUS MARIA VAN - EP
- Unidade: EP
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Source:
- Título: Anais
- Conference titles: Congresso da Sociedade Brasileira de Microeletronica
-
ABNT
SOARES JUNIOR, João Navarro e VAN NOIJE, Wilhelmus Adrianus Maria. Precise final state determination of cmos latches. 1993, Anais.. Campinas: Sbmicro, 1993. . Acesso em: 23 jan. 2026. -
APA
Soares Junior, J. N., & Van Noije, W. A. M. (1993). Precise final state determination of cmos latches. In Anais. Campinas: Sbmicro. -
NLM
Soares Junior JN, Van Noije WAM. Precise final state determination of cmos latches. Anais. 1993 ;[citado 2026 jan. 23 ] -
Vancouver
Soares Junior JN, Van Noije WAM. Precise final state determination of cmos latches. Anais. 1993 ;[citado 2026 jan. 23 ] - Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design
- Conversores D/A de 6 bits desenvolvido em pre-difundido do tipo mar de transistores
- The use of extended TSPC CMOS structures to build circuits with doubled input/output data throughput
- Analysis of the histogram testing applied to obtain the effective bit number for ADC
- Implementation of analog circuits on digital sea of gates
- E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications
- A 1.6 GHz dual modulus prescaler using the extended true single-phase-clock CMOS circuit technique (E-TSPC)
- Precise final state determination of mismatched cmos latches
- A small area 8 bits 50 MHz CMOS DAC for bluetooth transmitter
- Analog circuits on sog gate arrays: an 100mhz 6-bit d / a converter
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