ReP USP - Resultado da busca

Trabalho de evento
Management and control of a bidirectional electric station in DC microgrids* (2020)
Leal, Wagner Coelho; Godinho, Marcelo Oilveira ; Aguiar, Cassius Rossi de ; Machado, Ricardo Quadros ; Fuzato, Guilherme Henrique Favaro ; Piardi, Artur Bohnen; Braggio, Almir A; Sonoda, Dabit G; Otto, Rodrigo B; Nadal, Zeno L. I
Source: Proceedings. Conference titles: IEEE International Conference on Industrial Technology - ICIT. Unidade: EESC
Subjects: BATERIAS ELÉTRICAS, CIRCUITOS INTEGRADOS, DESCARGA ELÉTRICA, CAPACITORES, ELETRÔNICA DE POTÊNCIA, DISTRIBUIÇÃO DE ENERGIA ELÉTRICA
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ABNT
LEAL, Wagner Coelho et al. Management and control of a bidirectional electric station in DC microgrids*. 2020, Anais.. Piscataway, NJ: Escola de Engenharia de São Carlos, Universidade de São Paulo, 2020. Disponível em: http://dx.doi.org/10.1109/ICIT45562.2020.9067191. Acesso em: 08 dez. 2025.
APA
Leal, W. C., Godinho, M. O., Aguiar, C. R. de, Machado, R. Q., Fuzato, G. H. F., Piardi, A. B., et al. (2020). Management and control of a bidirectional electric station in DC microgrids*. In Proceedings. Piscataway, NJ: Escola de Engenharia de São Carlos, Universidade de São Paulo. doi:10.1109/ICIT45562.2020.9067191
NLM
Leal WC, Godinho MO, Aguiar CR de, Machado RQ, Fuzato GHF, Piardi AB, Braggio AA, Sonoda DG, Otto RB, Nadal ZLI. Management and control of a bidirectional electric station in DC microgrids* [Internet]. Proceedings. 2020 ;[citado 2025 dez. 08 ] Available from: http://dx.doi.org/10.1109/ICIT45562.2020.9067191
Vancouver
Leal WC, Godinho MO, Aguiar CR de, Machado RQ, Fuzato GHF, Piardi AB, Braggio AA, Sonoda DG, Otto RB, Nadal ZLI. Management and control of a bidirectional electric station in DC microgrids* [Internet]. Proceedings. 2020 ;[citado 2025 dez. 08 ] Available from: http://dx.doi.org/10.1109/ICIT45562.2020.9067191
Trabalho de evento
Autotuning under tight budget constraints: a transparent design of experiments approach (2019)
Bruel, Pedro; Masnada, Steven Quinito; Videau, Brice; Legrand, Arnaud; Vincent, Jean-Marc; Goldman, Alfredo
Source: Proceedings. Conference titles: IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing - CCGRID. Unidade: IME
Subjects: COMPUTAÇÃO GRÁFICA, CIRCUITOS INTEGRADOS
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ABNT
BRUEL, Pedro et al. Autotuning under tight budget constraints: a transparent design of experiments approach. 2019, Anais.. Piscataway: IEEE, 2019. Disponível em: https://doi.org/10.1109/CCGRID.2019.00026. Acesso em: 08 dez. 2025.
APA
Bruel, P., Masnada, S. Q., Videau, B., Legrand, A., Vincent, J. -M., & Goldman, A. (2019). Autotuning under tight budget constraints: a transparent design of experiments approach. In Proceedings. Piscataway: IEEE. doi:10.1109/CCGRID.2019.00026
NLM
Bruel P, Masnada SQ, Videau B, Legrand A, Vincent J-M, Goldman A. Autotuning under tight budget constraints: a transparent design of experiments approach [Internet]. Proceedings. 2019 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/CCGRID.2019.00026
Vancouver
Bruel P, Masnada SQ, Videau B, Legrand A, Vincent J-M, Goldman A. Autotuning under tight budget constraints: a transparent design of experiments approach [Internet]. Proceedings. 2019 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/CCGRID.2019.00026
Trabalho de evento
Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS (2019)
Campos, Arthur Lombardi; Soares Junior, João Navarro ; Luppe, Maximiliam
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design - SBCCI. Unidade: EESC
Subjects: CIRCUITOS INTEGRADOS, CONVERSORES ELÉTRICOS, ENGENHARIA ELÉTRICA
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ABNT
CAMPOS, Arthur Lombardi e SOARES JUNIOR, João Navarro e LUPPE, Maximiliam. Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS. 2019, Anais.. New York, NY, USA: ACM, 2019. Disponível em: https://doi.org/10.1145/3338852.3339857. Acesso em: 08 dez. 2025.
APA
Campos, A. L., Soares Junior, J. N., & Luppe, M. (2019). Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS. In Proceedings. New York, NY, USA: ACM. doi:10.1145/3338852.3339857
NLM
Campos AL, Soares Junior JN, Luppe M. Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS [Internet]. Proceedings. 2019 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1145/3338852.3339857
Vancouver
Campos AL, Soares Junior JN, Luppe M. Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS [Internet]. Proceedings. 2019 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1145/3338852.3339857
Trabalho de evento
A biopotential amplifier in CMOS for neural recording on optogenetics applications (2017)
Granado, T. C.; Gounella, R. H.; Costa, J. P.; Assagra, Y. A. O.; Carmo, João Paulo Pereira do
Source: Proceedings. Conference titles: Symposium on Microelectronics Technology and Devices - SBMICRO 2017. Unidade: EESC
Subjects: CIRCUITOS INTEGRADOS, ELETROENCEFALOGRAFIA, ENGENHARIA ELÉTRICA
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ABNT
GRANADO, T. C. et al. A biopotential amplifier in CMOS for neural recording on optogenetics applications. 2017, Anais.. São Paulo, SP: SBM, 2017. . Acesso em: 08 dez. 2025.
APA
Granado, T. C., Gounella, R. H., Costa, J. P., Assagra, Y. A. O., & Carmo, J. P. P. do. (2017). A biopotential amplifier in CMOS for neural recording on optogenetics applications. In Proceedings. São Paulo, SP: SBM.
NLM
Granado TC, Gounella RH, Costa JP, Assagra YAO, Carmo JPP do. A biopotential amplifier in CMOS for neural recording on optogenetics applications. Proceedings. 2017 ;[citado 2025 dez. 08 ]
Vancouver
Granado TC, Gounella RH, Costa JP, Assagra YAO, Carmo JPP do. A biopotential amplifier in CMOS for neural recording on optogenetics applications. Proceedings. 2017 ;[citado 2025 dez. 08 ]
Trabalho de evento
Fully integrated RF mixer in 0.7μm CMOS for intra-corporal communication devices (2017)
Celino, Daniel Ricardo; Gounella, Rodrigo Henrique; Costa, João Paulo de Campos da; Assagra, Yuri Andrey Olivato; Carmo, João Paulo Pereira do
Source: Proceedings. Conference titles: Symposium on Microelectronics Technology and Devices - SBMICRO 2017. Unidade: EESC
Subjects: SEMICONDUTORES, CIRCUITOS INTEGRADOS, ENGENHARIA ELÉTRICA
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ABNT
CELINO, Daniel Ricardo et al. Fully integrated RF mixer in 0.7μm CMOS for intra-corporal communication devices. 2017, Anais.. São Paulo, SP: Escola de Engenharia de São Carlos, Universidade de São Paulo, 2017. Disponível em: https://repositorio.usp.br/directbitstream/79dac6a8-6084-42af-8f7b-be970c71d648/OK___trabalho%2001%20%28SAAEI%202018%29.pdf. Acesso em: 08 dez. 2025.
APA
Celino, D. R., Gounella, R. H., Costa, J. P. de C. da, Assagra, Y. A. O., & Carmo, J. P. P. do. (2017). Fully integrated RF mixer in 0.7μm CMOS for intra-corporal communication devices. In Proceedings. São Paulo, SP: Escola de Engenharia de São Carlos, Universidade de São Paulo. Recuperado de https://repositorio.usp.br/directbitstream/79dac6a8-6084-42af-8f7b-be970c71d648/OK___trabalho%2001%20%28SAAEI%202018%29.pdf
NLM
Celino DR, Gounella RH, Costa JP de C da, Assagra YAO, Carmo JPP do. Fully integrated RF mixer in 0.7μm CMOS for intra-corporal communication devices [Internet]. Proceedings. 2017 ;[citado 2025 dez. 08 ] Available from: https://repositorio.usp.br/directbitstream/79dac6a8-6084-42af-8f7b-be970c71d648/OK___trabalho%2001%20%28SAAEI%202018%29.pdf
Vancouver
Celino DR, Gounella RH, Costa JP de C da, Assagra YAO, Carmo JPP do. Fully integrated RF mixer in 0.7μm CMOS for intra-corporal communication devices [Internet]. Proceedings. 2017 ;[citado 2025 dez. 08 ] Available from: https://repositorio.usp.br/directbitstream/79dac6a8-6084-42af-8f7b-be970c71d648/OK___trabalho%2001%20%28SAAEI%202018%29.pdf
Trabalho de evento
A RF modulator/demodulator for samll signal range wireless devices (2016)
Celino, Daniel Ricardo; Assagra, Yuri Andrey Olivato; Granado, Talita Conte; Correia, J. H.; Carmo, João Paulo Pereira do
Source: Proceedings. Conference titles: Seminário Anual de Automática, Electrónica Industrial e Instrumentación. Unidade: EESC
Subjects: CIRCUITOS INTEGRADOS, ENGENHARIA ELÉTRICA, CONVERSORES ELÉTRICOS
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ABNT
CELINO, Daniel Ricardo et al. A RF modulator/demodulator for samll signal range wireless devices. 2016, Anais.. Elche, Spain: Escola de Engenharia de São Carlos, Universidade de São Paulo, 2016. Disponível em: https://repositorio.usp.br/directbitstream/2c0390bd-65e0-4b95-8ce2-930a257ec1c9/DANIEL_SAAEI_2016.pdf. Acesso em: 08 dez. 2025.
APA
Celino, D. R., Assagra, Y. A. O., Granado, T. C., Correia, J. H., & Carmo, J. P. P. do. (2016). A RF modulator/demodulator for samll signal range wireless devices. In Proceedings. Elche, Spain: Escola de Engenharia de São Carlos, Universidade de São Paulo. Recuperado de https://repositorio.usp.br/directbitstream/2c0390bd-65e0-4b95-8ce2-930a257ec1c9/DANIEL_SAAEI_2016.pdf
NLM
Celino DR, Assagra YAO, Granado TC, Correia JH, Carmo JPP do. A RF modulator/demodulator for samll signal range wireless devices [Internet]. Proceedings. 2016 ;[citado 2025 dez. 08 ] Available from: https://repositorio.usp.br/directbitstream/2c0390bd-65e0-4b95-8ce2-930a257ec1c9/DANIEL_SAAEI_2016.pdf
Vancouver
Celino DR, Assagra YAO, Granado TC, Correia JH, Carmo JPP do. A RF modulator/demodulator for samll signal range wireless devices [Internet]. Proceedings. 2016 ;[citado 2025 dez. 08 ] Available from: https://repositorio.usp.br/directbitstream/2c0390bd-65e0-4b95-8ce2-930a257ec1c9/DANIEL_SAAEI_2016.pdf
Trabalho de evento
Design for stability of active inductor with feedback resistance (2014)
Guerreiro, Gabriel Rebello; Soares Junior, João Navarro
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design - SBCCI. Unidade: EESC
Subjects: CIRCUITOS INTEGRADOS, ENGENHARIA ELÉTRICA
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ABNT
GUERREIRO, Gabriel Rebello e SOARES JUNIOR, João Navarro. Design for stability of active inductor with feedback resistance. 2014, Anais.. Rio de Janeiro, RJ: Escola de Engenharia de São Carlos, Universidade de São Paulo, 2014. Disponível em: http://dx.doi.org/10.1145/2660540.2660549. Acesso em: 08 dez. 2025.
APA
Guerreiro, G. R., & Soares Junior, J. N. (2014). Design for stability of active inductor with feedback resistance. In Proceedings. Rio de Janeiro, RJ: Escola de Engenharia de São Carlos, Universidade de São Paulo. doi:10.1145/2660540.2660549
NLM
Guerreiro GR, Soares Junior JN. Design for stability of active inductor with feedback resistance [Internet]. Proceedings. 2014 ;[citado 2025 dez. 08 ] Available from: http://dx.doi.org/10.1145/2660540.2660549
Vancouver
Guerreiro GR, Soares Junior JN. Design for stability of active inductor with feedback resistance [Internet]. Proceedings. 2014 ;[citado 2025 dez. 08 ] Available from: http://dx.doi.org/10.1145/2660540.2660549
Trabalho de evento
Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices (2001)
Nicolett, Aparecido Sirley; Martino, João Antonio ; Simoen, Eddy ; Claeys, Cor
Source: Proceedings. Conference titles: International Symposium on Silicon-on-Insulator Technology and Devices. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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ABNT
NICOLETT, Aparecido Sirley et al. Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices. 2001, Anais.. Pennington: The Electrochemical Society, 2001. . Acesso em: 08 dez. 2025.
APA
Nicolett, A. S., Martino, J. A., Simoen, E., & Claeys, C. (2001). Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices. In Proceedings. Pennington: The Electrochemical Society.
NLM
Nicolett AS, Martino JA, Simoen E, Claeys C. Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Vancouver
Nicolett AS, Martino JA, Simoen E, Claeys C. Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Trabalho de evento
Analog circuit design using graded-channel SOI NMOSFETs (2001)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Flandre, Denis
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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ABNT
PAVANELLO, Marcelo Antonio e MARTINO, João Antonio e FLANDRE, Denis. Analog circuit design using graded-channel SOI NMOSFETs. 2001, Anais.. Piscataway: IEEE, 2001. . Acesso em: 08 dez. 2025.
APA
Pavanello, M. A., Martino, J. A., & Flandre, D. (2001). Analog circuit design using graded-channel SOI NMOSFETs. In Proceedings. Piscataway: IEEE.
NLM
Pavanello MA, Martino JA, Flandre D. Analog circuit design using graded-channel SOI NMOSFETs. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Vancouver
Pavanello MA, Martino JA, Flandre D. Analog circuit design using graded-channel SOI NMOSFETs. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Trabalho de evento
High performance current mirrors using graded-channel SOI NMOSFETs (2001)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Flandre, Denis
Source: Proceedings. Conference titles: International Symposium on Silicon-on-Insulator Technology and Devices. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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ABNT
PAVANELLO, Marcelo Antonio e MARTINO, João Antonio e FLANDRE, Denis. High performance current mirrors using graded-channel SOI NMOSFETs. 2001, Anais.. Pennington: The Electrochemical Society, 2001. . Acesso em: 08 dez. 2025.
APA
Pavanello, M. A., Martino, J. A., & Flandre, D. (2001). High performance current mirrors using graded-channel SOI NMOSFETs. In Proceedings. Pennington: The Electrochemical Society.
NLM
Pavanello MA, Martino JA, Flandre D. High performance current mirrors using graded-channel SOI NMOSFETs. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Vancouver
Pavanello MA, Martino JA, Flandre D. High performance current mirrors using graded-channel SOI NMOSFETs. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Trabalho de evento
Modeling of the leakage drain current in accumulation mode SOI pMOSFETs for high-temperature applications (2001)
Bellodi, Marcello; Iniguez, Benjamin; Flandre, Denis ; Martino, João Antonio
Source: Proceedings. Conference titles: International Symposium on Silicon-on-Insulator Technology and Devices. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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ABNT
BELLODI, Marcello et al. Modeling of the leakage drain current in accumulation mode SOI pMOSFETs for high-temperature applications. 2001, Anais.. Pennington: The Electrochemical Society, 2001. . Acesso em: 08 dez. 2025.
APA
Bellodi, M., Iniguez, B., Flandre, D., & Martino, J. A. (2001). Modeling of the leakage drain current in accumulation mode SOI pMOSFETs for high-temperature applications. In Proceedings. Pennington: The Electrochemical Society.
NLM
Bellodi M, Iniguez B, Flandre D, Martino JA. Modeling of the leakage drain current in accumulation mode SOI pMOSFETs for high-temperature applications. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Vancouver
Bellodi M, Iniguez B, Flandre D, Martino JA. Modeling of the leakage drain current in accumulation mode SOI pMOSFETs for high-temperature applications. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Trabalho de evento
Determination of silicon film doping concentration and back interface oxide charge density using SOI-MOS capacitor (2001)
Sonnenberg, Victor ; Martino, João Antonio
Source: Proceedings. Conference titles: International Symposium on Silicon-on-Insulator Technology and Devices. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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ABNT
SONNENBERG, Victor e MARTINO, João Antonio. Determination of silicon film doping concentration and back interface oxide charge density using SOI-MOS capacitor. 2001, Anais.. Pennington: The Electrochemical Society, 2001. . Acesso em: 08 dez. 2025.
APA
Sonnenberg, V., & Martino, J. A. (2001). Determination of silicon film doping concentration and back interface oxide charge density using SOI-MOS capacitor. In Proceedings. Pennington: The Electrochemical Society.
NLM
Sonnenberg V, Martino JA. Determination of silicon film doping concentration and back interface oxide charge density using SOI-MOS capacitor. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Vancouver
Sonnenberg V, Martino JA. Determination of silicon film doping concentration and back interface oxide charge density using SOI-MOS capacitor. Proceedings. 2001 ;[citado 2025 dez. 08 ]
Trabalho de evento
Synthesis of multi-burst controllers as modified Huffman machines (2001)
Oliveira, Duarte Lopes de; Strum, Marius; Wang, Jiang Chau ; Cunha, Wagner C
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Subjects: CIRCUITOS INTEGRADOS, ALGORITMOS E ESTRUTURAS DE DADOS, SINAL
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ABNT
OLIVEIRA, Duarte Lopes de et al. Synthesis of multi-burst controllers as modified Huffman machines. 2001, Anais.. [Los Alamitos]: IEEE, 2001. Disponível em: https://doi.org/10.1109/SBCCI.2001.953030. Acesso em: 08 dez. 2025.
APA
Oliveira, D. L. de, Strum, M., Wang, J. C., & Cunha, W. C. (2001). Synthesis of multi-burst controllers as modified Huffman machines. In Proceedings. [Los Alamitos]: IEEE. doi:10.1109/SBCCI.2001.953030
NLM
Oliveira DL de, Strum M, Wang JC, Cunha WC. Synthesis of multi-burst controllers as modified Huffman machines [Internet]. Proceedings. 2001 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/SBCCI.2001.953030
Vancouver
Oliveira DL de, Strum M, Wang JC, Cunha WC. Synthesis of multi-burst controllers as modified Huffman machines [Internet]. Proceedings. 2001 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/SBCCI.2001.953030
Trabalho de evento
Synthesis of the high performance extended burst mode asynchronous state machines (2000)
Oliveira, Duarte Lopes de; Strum, Marius; Wang, Jiang Chau ; Cunha, Wagner Chiepa
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
OLIVEIRA, Duarte Lopes de et al. Synthesis of the high performance extended burst mode asynchronous state machines. 2000, Anais.. Los Alamitos: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Oliveira, D. L. de, Strum, M., Wang, J. C., & Cunha, W. C. (2000). Synthesis of the high performance extended burst mode asynchronous state machines. In Proceedings. Los Alamitos: IEEE.
NLM
Oliveira DL de, Strum M, Wang JC, Cunha WC. Synthesis of the high performance extended burst mode asynchronous state machines. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Oliveira DL de, Strum M, Wang JC, Cunha WC. Synthesis of the high performance extended burst mode asynchronous state machines. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Trabalho de evento
Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs (2000)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Flandre, Denis
Source: Proceedings. Conference titles: IEEE International Conference on Devices, Circuits and Syems. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
PAVANELLO, Marcelo Antonio e MARTINO, João Antonio e FLANDRE, Denis. Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs. 2000, Anais.. Piscataway: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Pavanello, M. A., Martino, J. A., & Flandre, D. (2000). Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs. In Proceedings. Piscataway: IEEE.
NLM
Pavanello MA, Martino JA, Flandre D. Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Pavanello MA, Martino JA, Flandre D. Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Trabalho de evento
On the choice of models of computation for writing executable specifications of system level designs (2000)
Jeukens, Ivan; Strum, Marius
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
JEUKENS, Ivan e STRUM, Marius. On the choice of models of computation for writing executable specifications of system level designs. 2000, Anais.. Los Alamitos: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Jeukens, I., & Strum, M. (2000). On the choice of models of computation for writing executable specifications of system level designs. In Proceedings. Los Alamitos: IEEE.
NLM
Jeukens I, Strum M. On the choice of models of computation for writing executable specifications of system level designs. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Jeukens I, Strum M. On the choice of models of computation for writing executable specifications of system level designs. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Trabalho de evento
Prototyping a pager-like device using FPGAs: design of an object finder (2000)
Cerezo Vásquez, Gustavo Adolfo; Van Noije, Wilhelmus Adrianus Maria ; Barbin, Silvio Ernesto
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
CEREZO VÁSQUEZ, Gustavo Adolfo e VAN NOIJE, Wilhelmus Adrianus Maria e BARBIN, Silvio Ernesto. Prototyping a pager-like device using FPGAs: design of an object finder. 2000, Anais.. Los Alamitos: IEEE, 2000. Disponível em: https://doi.org/10.1109/SBCCI.2000.876029. Acesso em: 08 dez. 2025.
APA
Cerezo Vásquez, G. A., Van Noije, W. A. M., & Barbin, S. E. (2000). Prototyping a pager-like device using FPGAs: design of an object finder. In Proceedings. Los Alamitos: IEEE. doi:10.1109/SBCCI.2000.876029
NLM
Cerezo Vásquez GA, Van Noije WAM, Barbin SE. Prototyping a pager-like device using FPGAs: design of an object finder [Internet]. Proceedings. 2000 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/SBCCI.2000.876029
Vancouver
Cerezo Vásquez GA, Van Noije WAM, Barbin SE. Prototyping a pager-like device using FPGAs: design of an object finder [Internet]. Proceedings. 2000 ;[citado 2025 dez. 08 ] Available from: https://doi.org/10.1109/SBCCI.2000.876029
Trabalho de evento
A data path synthesis method to self-testable application specific integrated circuit (ASIC) (2000)
Costa, Jefferson Perez R.; Vale Neto, José Vieira do
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
COSTA, Jefferson Perez R. e VALE NETO, José Vieira do. A data path synthesis method to self-testable application specific integrated circuit (ASIC). 2000, Anais.. Los Alamitos: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Costa, J. P. R., & Vale Neto, J. V. do. (2000). A data path synthesis method to self-testable application specific integrated circuit (ASIC). In Proceedings. Los Alamitos: IEEE.
NLM
Costa JPR, Vale Neto JV do. A data path synthesis method to self-testable application specific integrated circuit (ASIC). Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Costa JPR, Vale Neto JV do. A data path synthesis method to self-testable application specific integrated circuit (ASIC). Proceedings. 2000 ;[citado 2025 dez. 08 ]
Trabalho de evento
Modeling and E1/TU12 mapper for SDH systems (2000)
Silveira, Reinaldo; Van Noije, Wilhelmus Adrianus Maria
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVEIRA, Reinaldo e VAN NOIJE, Wilhelmus Adrianus Maria. Modeling and E1/TU12 mapper for SDH systems. 2000, Anais.. Los Alamitos: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Silveira, R., & Van Noije, W. A. M. (2000). Modeling and E1/TU12 mapper for SDH systems. In Proceedings. Los Alamitos: IEEE.
NLM
Silveira R, Van Noije WAM. Modeling and E1/TU12 mapper for SDH systems. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Silveira R, Van Noije WAM. Modeling and E1/TU12 mapper for SDH systems. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Trabalho de evento
A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K (2000)
Nicolett, Aparecido Sirley; Martino, João Antonio ; Simoen, Eddy ; Claeys, Cor
Source: Proceedings. Conference titles: IEEE International Conference on Devices, Circuits and Syems. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
NICOLETT, Aparecido Sirley et al. A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K. 2000, Anais.. Piscataway: IEEE, 2000. . Acesso em: 08 dez. 2025.
APA
Nicolett, A. S., Martino, J. A., Simoen, E., & Claeys, C. (2000). A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K. In Proceedings. Piscataway: IEEE.
NLM
Nicolett AS, Martino JA, Simoen E, Claeys C. A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K. Proceedings. 2000 ;[citado 2025 dez. 08 ]
Vancouver
Nicolett AS, Martino JA, Simoen E, Claeys C. A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K. Proceedings. 2000 ;[citado 2025 dez. 08 ]

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