Souza Junior, Carlos Alberto Oliveira de 
; Bispo, João ; Cardoso, João Manuel Paiva ; Diniz, Pedro C; Marques, Eduardo
Source: Electronics. Unidade: ICMC
Subjects: EQUAÇÕES DIFERENCIAIS ORDINÁRIAS, HARDWARE
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ABNT
SOUZA JUNIOR, Carlos Alberto Oliveira de; BISPO, João; CARDOSO, João Manuel Paiva; DINIZ, Pedro C; MARQUES, Eduardo. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture. Electronics, Basel, v. 9, n. 5, p. 1-14, 2020. Disponível em: < https://doi.org/10.3390/electronics9050843 > DOI: 10.3390/electronics9050843.APA
Souza Junior, C. A. O. de, Bispo, J., Cardoso, J. M. P., Diniz, P. C., & Marques, E. (2020). Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture. Electronics, 9( 5), 1-14. doi:10.3390/electronics9050843NLM
Souza Junior CAO de, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture [Internet]. Electronics. 2020 ; 9( 5): 1-14.Available from: https://doi.org/10.3390/electronics9050843Vancouver
Souza Junior CAO de, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture [Internet]. Electronics. 2020 ; 9( 5): 1-14.Available from: https://doi.org/10.3390/electronics9050843
