Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA

Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA (2017)

Authors:
USP affiliated authors: MARQUES, EDUARDO - ICMC ; BONATO, VANDERLEI - ICMC
Unidade: ICMC
DOI: 10.1109/DSD.2017.32
Subjects: SISTEMAS EMBUTIDOS; COMPUTAÇÃO EVOLUTIVA; ROBÓTICA
Language: Inglês
Imprenta:
- Publisher: IEEE
- Publisher place: Los Alamitos, CA
- Date published: 2017
Source:
- Título: Proceedings
Conference titles: Euromicro Conference on Digital System Design - DSD

Informações sobre o DOI: 10.1109/DSD.2017.32 (Fonte: oaDOI API)

A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas

ABNT

PERINA, André Bannwart et al. Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA. 2017, Anais.. Los Alamitos, CA: IEEE, 2017. Disponível em: https://doi.org/10.1109/DSD.2017.32. Acesso em: 14 fev. 2026.
APA

Perina, A. B., Matias, P., Lima, J. M. G. P. de B., Marques, E., & Bonato, V. (2017). Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA. In Proceedings. Los Alamitos, CA: IEEE. doi:10.1109/DSD.2017.32
NLM

Perina AB, Matias P, Lima JMGP de B, Marques E, Bonato V. Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA [Internet]. Proceedings. 2017 ;[citado 2026 fev. 14 ] Available from: https://doi.org/10.1109/DSD.2017.32
Vancouver

Perina AB, Matias P, Lima JMGP de B, Marques E, Bonato V. Exploiting Kant and Kimura’s matrix inversion algorithm on FPGA [Internet]. Proceedings. 2017 ;[citado 2026 fev. 14 ] Available from: https://doi.org/10.1109/DSD.2017.32