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Artigo de periodico
Tunnel-FET evolution and applications for analog circuits (2022)
Agopian, Paula Ghedini Der ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita ; Claeys, Cor
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
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ABNT
AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 08 out. 2024.
APA
Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631
NLM
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Vancouver
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Artigo de periodico
Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective (2016)
Bordallo, Caio Cesar Mendes ; Claeys, Cor ; Thean, Aaron; Simoen, Eddy ; Vandooren, A; Rooyackers, Rita; Agopian, Paula Ghedini Der ; Sivieri, Victor de Bodt; Martino, João Antonio
Source: IEEE Transactions on Electron Devices. Unidade: EP
Subjects: TRANSISTORES, SILÍCIO
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ABNT
BORDALLO, Caio Cesar Mendes et al. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, v. 63, n. 7, p. 2930-2935, 2016Tradução . . Disponível em: https://doi.org/10.1109/ted.2016.2559580. Acesso em: 08 out. 2024.
APA
Bordallo, C. C. M., Claeys, C., Thean, A., Simoen, E., Vandooren, A., Rooyackers, R., et al. (2016). Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, 63( 7), 2930-2935. doi:10.1109/ted.2016.2559580
NLM
Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2016.2559580
Vancouver
Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2016.2559580
Artigo de periodico
Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs (2015)
Agopian, Paula Ghedini Der ; Martino, João Antonio ; Santos, Sara Dereste dos; Rooyackers, Rita; Vandoren, A
Source: IEEE Transactions on Electron Devices. Unidade: EP
Subjects: MICROELETRÔNICA, TRANSISTORES, SILÍCIO
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ABNT
AGOPIAN, Paula Ghedini Der et al. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs. IEEE Transactions on Electron Devices, v. 62, n. Ja 2015, p. 16-22, 2015Tradução . . Disponível em: https://doi.org/10.1109/ted.2014.2367659. Acesso em: 08 out. 2024.
APA
Agopian, P. G. D., Martino, J. A., Santos, S. D. dos, Rooyackers, R., & Vandoren, A. (2015). Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs. IEEE Transactions on Electron Devices, 62( Ja 2015), 16-22. doi:10.1109/ted.2014.2367659
NLM
Agopian PGD, Martino JA, Santos SD dos, Rooyackers R, Vandoren A. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs [Internet]. IEEE Transactions on Electron Devices. 2015 ; 62( Ja 2015): 16-22.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2014.2367659
Vancouver
Agopian PGD, Martino JA, Santos SD dos, Rooyackers R, Vandoren A. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs [Internet]. IEEE Transactions on Electron Devices. 2015 ; 62( Ja 2015): 16-22.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2014.2367659
Artigo de periodico
Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism (2015)
Martino, Márcio Dalla Valle; Thean, Aaron; Claeys, Cor ; Neves, Felipe S; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Vandooren, A; Rooyackers, Rita; Simoen, Eddy
Source: Solid-State Electronics. Unidade: EP
Subjects: TRANSISTORES, MICROELETRÔNICA
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ABNT
MARTINO, Márcio Dalla Valle et al. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism. Solid-State Electronics, v. 112, p. 51-55, 2015Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2015.02.006. Acesso em: 08 out. 2024.
APA
Martino, M. D. V., Thean, A., Claeys, C., Neves, F. S., Agopian, P. G. D., Martino, J. A., et al. (2015). Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism. Solid-State Electronics, 112, 51-55. doi:10.1016/j.sse.2015.02.006
NLM
Martino MDV, Thean A, Claeys C, Neves FS, Agopian PGD, Martino JA, Vandooren A, Rooyackers R, Simoen E. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism [Internet]. Solid-State Electronics. 2015 ; 112 51-55.[citado 2024 out. 08 ] Available from: https://doi.org/10.1016/j.sse.2015.02.006
Vancouver
Martino MDV, Thean A, Claeys C, Neves FS, Agopian PGD, Martino JA, Vandooren A, Rooyackers R, Simoen E. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism [Internet]. Solid-State Electronics. 2015 ; 112 51-55.[citado 2024 out. 08 ] Available from: https://doi.org/10.1016/j.sse.2015.02.006
Trabalho de evento
Influence of interface trap density on vertical NW-TFETs with different source composition (2013)
Martino, João Antonio ; Souza, Felipe Neves; Agopian, Paula Ghedini Der ; Rooyackers, Rita; Vandooren, A.; Simoen, Eddy ; Claeys, Cor
Source: EUROSOI 2013. Conference titles: European Workshop on Silicon on Insulator Technology, Devices and Circuits. Unidade: EP
Assunto: MICROELETRÔNICA
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ABNT
MARTINO, João Antonio et al. Influence of interface trap density on vertical NW-TFETs with different source composition. 2013, Anais.. Paris: Institut Superieur d'Électronique, 2013. . Acesso em: 08 out. 2024.
APA
Martino, J. A., Souza, F. N., Agopian, P. G. D., Rooyackers, R., Vandooren, A., Simoen, E., & Claeys, C. (2013). Influence of interface trap density on vertical NW-TFETs with different source composition. In EUROSOI 2013. Paris: Institut Superieur d'Électronique.
NLM
Martino JA, Souza FN, Agopian PGD, Rooyackers R, Vandooren A, Simoen E, Claeys C. Influence of interface trap density on vertical NW-TFETs with different source composition. EUROSOI 2013. 2013 ;[citado 2024 out. 08 ]
Vancouver
Martino JA, Souza FN, Agopian PGD, Rooyackers R, Vandooren A, Simoen E, Claeys C. Influence of interface trap density on vertical NW-TFETs with different source composition. EUROSOI 2013. 2013 ;[citado 2024 out. 08 ]
Artigo de periodico
Nanowire Tunnel Field Effect Transistors at High Temperature (2013)
Martino, Márcio Dalla Valle; Neves, Felipe Souza; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Rooyackers, Rita; Claeys, Cor
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Assunto: NANOELETRÔNICA
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ABNT
MARTINO, Márcio Dalla Valle et al. Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, v. 8, n. 2, p. 110-115, 2013Tradução . . Disponível em: https://doi.org/10.29292/jics.v8i2.381. Acesso em: 08 out. 2024.
APA
Martino, M. D. V., Neves, F. S., Agopian, P. G. D., Martino, J. A., Rooyackers, R., & Claeys, C. (2013). Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, 8( 2), 110-115. doi:10.29292/jics.v8i2.381
NLM
Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v8i2.381
Vancouver
Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v8i2.381
Artigo de periodico
Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature (2013)
Agopian, Paula Ghedini Der ; Simoen, Eddy ; Vandooren, A; Rooyackers, Rita; Martino, João Antonio
Source: IEEE Transactions on Electron Devices. Unidade: EP
Subjects: AVALIAÇÃO DE DESEMPENHO, TRANSISTORES
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ABNT
AGOPIAN, Paula Ghedini Der et al. Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature. IEEE Transactions on Electron Devices, v. 60, n. 8, p. 2493-2497, 2013Tradução . . Disponível em: https://doi.org/10.1109/ted.2013.2267614. Acesso em: 08 out. 2024.
APA
Agopian, P. G. D., Simoen, E., Vandooren, A., Rooyackers, R., & Martino, J. A. (2013). Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature. IEEE Transactions on Electron Devices, 60( 8), 2493-2497. doi:10.1109/ted.2013.2267614
NLM
Agopian PGD, Simoen E, Vandooren A, Rooyackers R, Martino JA. Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature [Internet]. IEEE Transactions on Electron Devices. 2013 ; 60( 8): 2493-2497.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2013.2267614
Vancouver
Agopian PGD, Simoen E, Vandooren A, Rooyackers R, Martino JA. Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature [Internet]. IEEE Transactions on Electron Devices. 2013 ; 60( 8): 2493-2497.[citado 2024 out. 08 ] Available from: https://doi.org/10.1109/ted.2013.2267614
Trabalho de evento
Temperature influence on nanowire tunnel field effect transistors (2012)
Neves, Felipe Souza; Martino, Márcio Dalla Valle; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Rooyackers, Rita ; Leonelli, Daniele ; Claeys, Cor
Source: Microelectronics technology and devices, SBMicro. Conference titles: International Symposium on Microelectronics Technology and Devices. Unidade: EP
Assunto: MICROELETRÔNICA
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ABNT
NEVES, Felipe Souza et al. Temperature influence on nanowire tunnel field effect transistors. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://doi.org/10.1149/04901.0223ecst. Acesso em: 08 out. 2024.
APA
Neves, F. S., Martino, M. D. V., Agopian, P. G. D., Martino, J. A., Rooyackers, R., Leonelli, D., & Claeys, C. (2012). Temperature influence on nanowire tunnel field effect transistors. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. doi:10.1149/04901.0223ecst
NLM
Neves FS, Martino MDV, Agopian PGD, Martino JA, Rooyackers R, Leonelli D, Claeys C. Temperature influence on nanowire tunnel field effect transistors [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2024 out. 08 ] Available from: https://doi.org/10.1149/04901.0223ecst
Vancouver
Neves FS, Martino MDV, Agopian PGD, Martino JA, Rooyackers R, Leonelli D, Claeys C. Temperature influence on nanowire tunnel field effect transistors [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2024 out. 08 ] Available from: https://doi.org/10.1149/04901.0223ecst
Artigo de periodico
Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs (2010)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Simoen, Eddy ; Claeys, Cor ; Rooyackers, Rita; Collaert, Nadine
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Assunto: TRANSISTORES
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ABNT
PAVANELLO, Marcelo Antonio et al. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 168-173, 2010Tradução . . Disponível em: https://doi.org/10.29292/jics.v5i2.324. Acesso em: 08 out. 2024.
APA
Pavanello, M. A., Martino, J. A., Simoen, E., Claeys, C., Rooyackers, R., & Collaert, N. (2010). Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, 5( 2), 168-173. doi:10.29292/jics.v5i2.324
NLM
Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v5i2.324
Vancouver
Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v5i2.324
Trabalho de evento
Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs (2008)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita; Collaert, Nadine ; Claeys, Cor
Source: SBMICRO 2008: Anais. Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO. Unidade: EP
Assunto: MICROELETRÔNICA
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ABNT
PAVANELLO, Marcelo Antonio et al. Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs. 2008, Anais.. Pennington: The Electrochemical Society, 2008. . Acesso em: 08 out. 2024.
APA
Pavanello, M. A., Martino, J. A., Simoen, E., Rooyackers, R., Collaert, N., & Claeys, C. (2008). Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs. In SBMICRO 2008: Anais. Pennington: The Electrochemical Society.
NLM
Pavanello MA, Martino JA, Simoen E, Rooyackers R, Collaert N, Claeys C. Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs. SBMICRO 2008: Anais. 2008 ;[citado 2024 out. 08 ]
Vancouver
Pavanello MA, Martino JA, Simoen E, Rooyackers R, Collaert N, Claeys C. Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs. SBMICRO 2008: Anais. 2008 ;[citado 2024 out. 08 ]
Trabalho de evento
Low temperature operation of undoped body triple-gate finFETs from an analog perspective (2007)
Pavanello, Marcelo Antonio ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita; Collaert, Nadine ; Claeys, Cor
Source: SBMicro 2007. Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO. Unidade: EP
Assunto: MICROELETRÔNICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
PAVANELLO, Marcelo Antonio et al. Low temperature operation of undoped body triple-gate finFETs from an analog perspective. 2007, Anais.. Pennington: The Electrochemical Society, 2007. . Acesso em: 08 out. 2024.
APA
Pavanello, M. A., Martino, J. A., Simoen, E., Rooyackers, R., Collaert, N., & Claeys, C. (2007). Low temperature operation of undoped body triple-gate finFETs from an analog perspective. In SBMicro 2007. Pennington: The Electrochemical Society.
NLM
Pavanello MA, Martino JA, Simoen E, Rooyackers R, Collaert N, Claeys C. Low temperature operation of undoped body triple-gate finFETs from an analog perspective. SBMicro 2007. 2007 ;[citado 2024 out. 08 ]
Vancouver
Pavanello MA, Martino JA, Simoen E, Rooyackers R, Collaert N, Claeys C. Low temperature operation of undoped body triple-gate finFETs from an analog perspective. SBMicro 2007. 2007 ;[citado 2024 out. 08 ]

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