Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism (2015)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; AGOPIAN, PAULA GHEDINI DER - EP ; MARTINO, MARCIO DALLA VALLE - EP
- Unidade: EP
- DOI: 10.1016/j.sse.2015.02.006
- Subjects: TRANSISTORES; MICROELETRÔNICA
- Language: Inglês
- Source:
- Título: Solid-State Electronics
- Volume/Número/Paginação/Ano: v. 112, p. 51-55, Oct 2015
- Este periódico é de acesso aberto
- Este artigo NÃO é de acesso aberto
-
ABNT
MARTINO, Márcio Dalla Valle et al. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism. Solid-State Electronics, v. 112, p. 51-55, 2015Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2015.02.006. Acesso em: 20 jan. 2026. -
APA
Martino, M. D. V., Thean, A., Claeys, C., Neves, F. S., Agopian, P. G. D., Martino, J. A., et al. (2015). Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism. Solid-State Electronics, 112, 51-55. doi:10.1016/j.sse.2015.02.006 -
NLM
Martino MDV, Thean A, Claeys C, Neves FS, Agopian PGD, Martino JA, Vandooren A, Rooyackers R, Simoen E. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism [Internet]. Solid-State Electronics. 2015 ; 112 51-55.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2015.02.006 -
Vancouver
Martino MDV, Thean A, Claeys C, Neves FS, Agopian PGD, Martino JA, Vandooren A, Rooyackers R, Simoen E. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism [Internet]. Solid-State Electronics. 2015 ; 112 51-55.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2015.02.006 - Performance of TFET and FinFET devices applied to current mirrors for different dimensions and temperatures
- Performance of differential pair circuits designed with line tunnel FET devices at different temperatures
- Nanowire Tunnel Field Effect Transistors at High Temperature
- Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures
- Cross-section features influence on surrounding MuGFETs
- The impact of the temperature on In0.53Ga0.47As nTFETs
- Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
- Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source
- Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs
- Influence of interface trap density on vertical NW-TFETs with different source composition
Informações sobre o DOI: 10.1016/j.sse.2015.02.006 (Fonte: oaDOI API)
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