Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures (2016)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; AGOPIAN, PAULA GHEDINI DER - EP ; OLIVEIRA, ALBERTO VINICIUS DE - EP
- Unidade: EP
- DOI: 10.1016/j.sse.2016.05.004
- Subjects: SEMICONDUTORES; MICROELETRÔNICA
- Language: Inglês
- Source:
- Título: Solid-State Electronics
- Volume/Número/Paginação/Ano: v. 123, p. 124-129, Sep 2016
- Este periódico é de acesso aberto
- Este artigo NÃO é de acesso aberto
-
ABNT
OLIVEIRA, Alberto Vinicius de et al. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures. Solid-State Electronics, v. 123, p. 124-129, 2016Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2016.05.004. Acesso em: 20 jan. 2026. -
APA
Oliveira, A. V. de, Collaert, N., Thean, A., Claeys, C., Simoen, E., Agopian, P. G. D., & Martino, J. A. (2016). Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures. Solid-State Electronics, 123, 124-129. doi:10.1016/j.sse.2016.05.004 -
NLM
Oliveira AV de, Collaert N, Thean A, Claeys C, Simoen E, Agopian PGD, Martino JA. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures [Internet]. Solid-State Electronics. 2016 ; 123 124-129.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2016.05.004 -
Vancouver
Oliveira AV de, Collaert N, Thean A, Claeys C, Simoen E, Agopian PGD, Martino JA. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures [Internet]. Solid-State Electronics. 2016 ; 123 124-129.[citado 2026 jan. 20 ] Available from: https://doi.org/10.1016/j.sse.2016.05.004 - Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs
- Split CV mobility at low temperature operation of Ge pFinFETs fabricated with STI first and last processes
- GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes
- Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes
- The impact of the temperature on In0.53Ga0.47As nTFETs
- Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
- Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source
- Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs
- Influence of interface trap density on vertical NW-TFETs with different source composition
- Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices
Informações sobre o DOI: 10.1016/j.sse.2016.05.004 (Fonte: oaDOI API)
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