Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures (2016)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; AGOPIAN, PAULA GHEDINI DER - EP ; OLIVEIRA, ALBERTO VINICIUS DE - EP
- Unidade: EP
- DOI: 10.1016/j.sse.2016.05.004
- Subjects: SEMICONDUTORES; MICROELETRÔNICA
- Language: Inglês
- Source:
- Título: Solid-State Electronics
- Volume/Número/Paginação/Ano: v. 123, p. 124-129, Sep 2016
- Este artigo possui versão em acesso aberto
- URL de acesso aberto
- Versão do Documento: Versão submetida (Pré-print)
-
Status: Artigo possui versão em acesso aberto em repositório (Green Open Access) -
ABNT
OLIVEIRA, Alberto Vinicius de et al. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures. Solid-State Electronics, v. 123, p. 124-129, 2016Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2016.05.004. Acesso em: 11 mar. 2026. -
APA
Oliveira, A. V. de, Collaert, N., Thean, A., Claeys, C., Simoen, E., Agopian, P. G. D., & Martino, J. A. (2016). Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures. Solid-State Electronics, 123, 124-129. doi:10.1016/j.sse.2016.05.004 -
NLM
Oliveira AV de, Collaert N, Thean A, Claeys C, Simoen E, Agopian PGD, Martino JA. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures [Internet]. Solid-State Electronics. 2016 ; 123 124-129.[citado 2026 mar. 11 ] Available from: https://doi.org/10.1016/j.sse.2016.05.004 -
Vancouver
Oliveira AV de, Collaert N, Thean A, Claeys C, Simoen E, Agopian PGD, Martino JA. Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures [Internet]. Solid-State Electronics. 2016 ; 123 124-129.[citado 2026 mar. 11 ] Available from: https://doi.org/10.1016/j.sse.2016.05.004 - GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes
- Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes
- Split CV mobility at low temperature operation of Ge pFinFETs fabricated with STI first and last processes
- Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs
- Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices
- Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature
- Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs
- Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs
- Threshold voltage extraction in Tunnel FETs
- Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source
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