Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures (2004)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2004
- ISBN: 1-56677-416-0
- Source:
- Título do periódico: Microelectronic technology and Devices SBMicro 2004. Proceedings, v. 2004-03
- Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO
-
ABNT
SANTOS, Carolina Davanzzo Gomes dos; PAVANELLO, Marcelo Antonio; MARTINO, João Antonio; FLANDRE, Denis; RASKIN, Jean-Pierre. Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures. Anais.. Pennington: The Electrochemical Society, 2004. -
APA
Santos, C. D. G. dos, Pavanello, M. A., Martino, J. A., Flandre, D., & Raskin, J. -P. (2004). Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures. In Microelectronic technology and Devices SBMicro 2004. Proceedings, v. 2004-03. Pennington: The Electrochemical Society. -
NLM
Santos CDG dos, Pavanello MA, Martino JA, Flandre D, Raskin J-P. Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures. Microelectronic technology and Devices SBMicro 2004. Proceedings, v. 2004-03. 2004 ; -
Vancouver
Santos CDG dos, Pavanello MA, Martino JA, Flandre D, Raskin J-P. Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures. Microelectronic technology and Devices SBMicro 2004. Proceedings, v. 2004-03. 2004 ; - Low-Frequency noise behaviour of bulk and DTMOS triple-gate devices under 60 MeV proton irradiaton
- Extraction of the oxide charge density at front and back interfaces of SOI NMOSFET devices
- Components of the leakage current in enhancement-mode SOI nMOSFETs at high temperature. (em CD-Rom)
- A new method for determination of the oxide charge density at the buried oxide/substrate interface in SOI capacitor
- A novel leakage drain current model for SOI MOSFETs devices at high temperature
- A physically-based continuous model for graded-channel SOI MOSFET
- Transistor soi-nmosfet nao auto-alinhado
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
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