Analog performance of graded-channel SOI NMOSFETS at low temperatures (2002)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2002
- ISBN: 1-56677-328-8
- Source:
- Título do periódico: Microelectronics Technology and Devices SBMICRO 2002
-
ABNT
PAVANELLO, Marcelo Antonio; MARTINO, João Antonio; FLANDRE, Denis. Analog performance of graded-channel SOI NMOSFETS at low temperatures. In: Microelectronics Technology and Devices SBMICRO 2002[S.l: s.n.], 2002. -
APA
Pavanello, M. A., Martino, J. A., & Flandre, D. (2002). Analog performance of graded-channel SOI NMOSFETS at low temperatures. In Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society. -
NLM
Pavanello MA, Martino JA, Flandre D. Analog performance of graded-channel SOI NMOSFETS at low temperatures. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. -
Vancouver
Pavanello MA, Martino JA, Flandre D. Analog performance of graded-channel SOI NMOSFETS at low temperatures. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. - Transistor soi-nmosfet nao auto-alinhado
- Impact of substrate effect on the fully depleted soi mesfet subthreshold slope at 300k and 77k
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Combined l and series resistance extraction of ldd mosfets
- Influencia da temperatura em transistores soi (silicon on insulator) mosfets
- New method for determination of the fixed charge densities at the buried oxide interfaces in soi mosfets
- Modelagem do substrato e novos métodos de caracterização elétrica de SOI MOSFET
- A novel leakage drain current model for SOI MOSFETs devices at high temperature
- Components of the leakage current in enhancement-mode SOI nMOSFETs at high temperature. (em CD-Rom)
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