Behavior of graded-channel fully depleted SOI NMOSFET at high temperatures (2002)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; PAVANELLO, MARCELO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2002
- Source:
- Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO
-
ABNT
GALETI, Milene e PAVANELLO, Marcelo Antonio e MARTINO, João Antonio. Behavior of graded-channel fully depleted SOI NMOSFET at high temperatures. Microelectronics Technology and Devices SBMICRO 2002. Tradução . Pennington: The Electrochemical Society, 2002. . . Acesso em: 28 fev. 2026. -
APA
Galeti, M., Pavanello, M. A., & Martino, J. A. (2002). Behavior of graded-channel fully depleted SOI NMOSFET at high temperatures. In Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society. -
NLM
Galeti M, Pavanello MA, Martino JA. Behavior of graded-channel fully depleted SOI NMOSFET at high temperatures. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. [citado 2026 fev. 28 ] -
Vancouver
Galeti M, Pavanello MA, Martino JA. Behavior of graded-channel fully depleted SOI NMOSFET at high temperatures. In: Microelectronics Technology and Devices SBMICRO 2002. Pennington: The Electrochemical Society; 2002. [citado 2026 fev. 28 ] - Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs
- Analysis on GC SOI MOSFET analog parameters at high temperatures
- Operation of double gate graded-channel transistors at low temperatures
- Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature
- Analog performance of graded-channel SOI NMOSFETS at low temperatures
- A simple analytical model of graded-channel SOI nMOSFET transconductance
- Implementation of tunable resistors using graded-channel SOI MOSFETs operating in cryogenic environments
- Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures
- Design of operational transconductance amplifiers with improved gain by using graded-channel SOI nMOSFETs
- Comparison between drain induced barrier lowering in partially and fully depleted 0.13'mu'm SOI nMOSFETs in low temperature operation
How to cite
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
