Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing (2007)
- Authors:
- USP affiliated authors: SILVA, JORGE LUIZ E - ICMC ; MARQUES, EDUARDO - ICMC
- Unidade: ICMC
- Assunto: SISTEMAS EMBUTIDOS
- Language: Inglês
- Source:
- Título do periódico: Latin American Applied Research
- ISSN: 0327-0793
- Volume/Número/Paginação/Ano: v. 37, n. 1, 2007
-
ABNT
SACCHETIN, Marcelo C.; LOPES, Joelmir José; WOLF, Denis Fernando; SILVA, Jorge Luiz e; MARQUES, Eduardo. Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing. Latin American Applied Research[S.l.], v. 37, n. 1, 2007. Disponível em: < http://www.laar.uns.edu.ar/indexes/artic_v3701/vol_37_1_pag31.pdf >. -
APA
Sacchetin, M. C., Lopes, J. J., Wolf, D. F., Silva, J. L. e, & Marques, E. (2007). Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing. Latin American Applied Research, 37( 1). Recuperado de http://www.laar.uns.edu.ar/indexes/artic_v3701/vol_37_1_pag31.pdf -
NLM
Sacchetin MC, Lopes JJ, Wolf DF, Silva JL e, Marques E. Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing [Internet]. Latin American Applied Research. 2007 ; 37( 1):Available from: http://www.laar.uns.edu.ar/indexes/artic_v3701/vol_37_1_pag31.pdf -
Vancouver
Sacchetin MC, Lopes JJ, Wolf DF, Silva JL e, Marques E. Analysis and implementation of localization and mapping algorithms for mobile robots based on reconfigurable computing [Internet]. Latin American Applied Research. 2007 ; 37( 1):Available from: http://www.laar.uns.edu.ar/indexes/artic_v3701/vol_37_1_pag31.pdf - Executing algorithms for dynamic dataflow reconfigurable hardware: the operators protocol
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- RtrASSoc51 - adaptable superscalar reconfigurable programmable system on chip: the reconfigurable tools for DSR a development system
- C commands Implemented direct into the hardware using the ChipCflow Machine
- A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
- RtrASSoc51-rI2C (reconfigurable inter integrated circuit)
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