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Artigo de periodico
ISFET fabrication and characterization for hydrogen peroxide sensing (2023)
Duarte, Pedro Henrique; Rangel, Ricardo Cardoso; Ramos, Daniel Augusto; Yojo, Leonardo Shimizu; Mori, Carlos Augusto Bergfeld; Sasaki, Katia Regina Akemi; Agopian, Paula Ghedini Der ; Martino, João Antonio
Fonte: Journal of Integrated Circuits and Systems. Unidade: EP
Assuntos: TRANSISTORES, SOLUÇÕES
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ABNT
DUARTE, Pedro Henrique et al. ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.646. Acesso em: 16 nov. 2025.
APA
Duarte, P. H., Rangel, R. C., Ramos, D. A., Yojo, L. S., Mori, C. A. B., Sasaki, K. R. A., et al. (2023). ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, 18( 1), 1-4. doi:10.29292/jics.v18i1.646
NLM
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v18i1.646
Vancouver
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v18i1.646
Artigo de periodico
Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data (2023)
Toledo, Rodrigo do Nascimento; Martino, João Antonio ; Agopian, Paula Ghedini Der
Fonte: Journal of Integrated Circuits and Systems. Unidade: EP
Assuntos: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA
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ABNT
TOLEDO, Rodrigo do Nascimento e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-6, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.653. Acesso em: 16 nov. 2025.
APA
Toledo, R. do N., Martino, J. A., & Agopian, P. G. D. (2023). Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, 18( 1), 1-6. doi:10.29292/jics.v18il.653
NLM
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Vancouver
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Artigo de periodico
Reconfigurable SOI-MOSFET: past, present and future applications (2022)
Rangel, Ricardo Cardoso; Sasaki, Kátia Regina Akemi ; Martino, João Antonio
Fonte: Journal of Integrated Circuits and Systems. Unidade: EP
Assuntos: TRANSISTORES, SENSOR, CIRCUITOS INTEGRADOS MOS
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ABNT
RANGEL, Ricardo Cardoso e SASAKI, Kátia Regina Akemi e MARTINO, João Antonio. Reconfigurable SOI-MOSFET: past, present and future applications. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.626. Acesso em: 16 nov. 2025.
APA
Rangel, R. C., Sasaki, K. R. A., & Martino, J. A. (2022). Reconfigurable SOI-MOSFET: past, present and future applications. Journal of Integrated Circuits and Systems, 17( 2), 1-9. doi:10.29292/jics.v17i2.626
NLM
Rangel RC, Sasaki KRA, Martino JA. Reconfigurable SOI-MOSFET: past, present and future applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.626
Vancouver
Rangel RC, Sasaki KRA, Martino JA. Reconfigurable SOI-MOSFET: past, present and future applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.626
Artigo de periodico
Tunnel-FET evolution and applications for analog circuits (2022)
Agopian, Paula Ghedini Der ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita ; Claeys, Cor
Fonte: Journal of Integrated Circuits and Systems. Unidade: EP
Assuntos: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
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ABNT
AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 16 nov. 2025.
APA
Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631
NLM
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Vancouver
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Artigo de periodico
Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications (2022)
Simoen, Eddy ; Coelho, Carlos Henrique Santos; Silva, Vanessa Cristina Pereira da; Martino, João Antonio ; Agopian, Paula Ghedini Der ; Oliveira, Alberto; Cretu, Bogdan; Veloso, Anabela
Fonte: Journal of Integrated Circuits and Systems. Unidades: EP, EESC
Assuntos: TRANSISTORES, NANOELETRÔNICA, TEMPERATURA
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ABNT
SIMOEN, Eddy et al. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.617. Acesso em: 16 nov. 2025.
APA
Simoen, E., Coelho, C. H. S., Silva, V. C. P. da, Martino, J. A., Agopian, P. G. D., Oliveira, A., et al. (2022). Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, 17( 2), 1-9. doi:10.29292/jics.v17i2.617
NLM
Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.617
Vancouver
Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.617
Artigo de periodico
Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C (2022)
Silva, Vanessa Cristina Pereira da; Leal, João Vitor da Costa; Perina, Welder F; Martino, João Antonio ; Simoen, Eddy ; Veloso, A; Agopian, Paula Ghedini Der
Fonte: Journal of Integrated Circuits and Systems. Unidade: EP
Assuntos: TRANSISTORES, NANOTECNOLOGIA, BAIXA TEMPERATURA
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ABNT
SILVA, Vanessa Cristina Pereira da et al. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-6, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.550. Acesso em: 16 nov. 2025.
APA
Silva, V. C. P. da, Leal, J. V. da C., Perina, W. F., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, 17( 1), 1-6. doi:10.29292/jics.v17i1.550
NLM
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17il.550
Vancouver
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17il.550

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