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  • Source: Solid State Electronics. Unidade: EP

    Subjects: TRANSISTORES, TEMPERATURA, NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS

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    • ABNT

      SILVA, V C P et al. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, v. 208, p. 1-5, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108729. Acesso em: 13 nov. 2024.
    • APA

      Silva, V. C. P., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2023). Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, 208, 1-5. doi:10.1016/j.sse.2023.108729
    • NLM

      Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
    • Vancouver

      Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
  • Source: Solid State Electronics. Unidade: EP

    Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, TEMPERATURA

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    • ABNT

      PERINA, Welder Fernandes et al. Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, v. 208, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108742. Acesso em: 13 nov. 2024.
    • APA

      Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, 208, 1-4. doi:10.1016/j.sse.2023.108742
    • NLM

      Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
    • Vancouver

      Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
  • Source: Solid State Electronics. Unidade: EP

    Subjects: NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, TRANSISTORES

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    • ABNT

      SOUSA, Julia Cristina Soares et al. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, v. 189, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108238. Acesso em: 13 nov. 2024.
    • APA

      Sousa, J. C. S., Perina, W. F., Rangel, R., Simoen, E., Veloso, A., Martino, J. A., & Agopian, P. G. D. (2022). Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, 189, 1-9. doi:10.1016/j.sse.2022.108238
    • NLM

      Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
    • Vancouver

      Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
  • Source: Solid State Electronics. Unidade: EP

    Subjects: NANOELETRÔNICA, DNA

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    • ABNT

      MORI, Carlos Augusto Bergfeld et al. Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108358. Acesso em: 13 nov. 2024.
    • APA

      Mori, C. A. B., Martens, K., Simoen, E., Van Dorpe, P., Agopian, P. G. D., & Martino, J. A. (2022). Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108358
    • NLM

      Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2022.108358
    • Vancouver

      Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 nov. 13 ] Available from: https://doi.org/10.1016/j.sse.2022.108358
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, NANOTECNOLOGIA, BAIXA TEMPERATURA

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    • ABNT

      SILVA, Vanessa Cristina Pereira da et al. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-6, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.550. Acesso em: 13 nov. 2024.
    • APA

      Silva, V. C. P. da, Leal, J. V. da C., Perina, W. F., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, 17( 1), 1-6. doi:10.29292/jics.v17i1.550
    • NLM

      Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2024 nov. 13 ] Available from: https://doi.org/10.29292/jics.v17il.550
    • Vancouver

      Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2024 nov. 13 ] Available from: https://doi.org/10.29292/jics.v17il.550

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