Validated test models for software product lines: featured finite state machines (2017)
- Authors:
- Autor USP: SIMÃO, ADENILSO DA SILVA - ICMC
- Unidade: ICMC
- DOI: 10.1007/978-3-319-57666-4_13
- Subjects: VALIDAÇÃO DE MODELOS; SOFTWARES; ENGENHARIA DE SOFTWARE
- Keywords: Formal modelling; Software Product Line; Finite State Machine
- Language: Inglês
- Imprenta:
- Source:
- Título: Lecture Notes in Computer Science (LNCS)
- ISSN: 0302-9743
- Volume/Número/Paginação/Ano: v. 10533, p. 210-227, 2017
- Conference titles: International Conference Formal Aspects of Component Software - FACS
- Este periódico é de acesso aberto
- Este artigo NÃO é de acesso aberto
-
ABNT
FRAGAL, Vanderson Hafemann e SIMÃO, Adenilso da Silva e MOUSAVI, Mohammad Reza. Validated test models for software product lines: featured finite state machines. Lecture Notes in Computer Science (LNCS). Cham, SZ: Springer. Disponível em: https://doi.org/10.1007/978-3-319-57666-4_13. Acesso em: 27 jan. 2026. , 2017 -
APA
Fragal, V. H., Simão, A. da S., & Mousavi, M. R. (2017). Validated test models for software product lines: featured finite state machines. Lecture Notes in Computer Science (LNCS). Cham, SZ: Springer. doi:10.1007/978-3-319-57666-4_13 -
NLM
Fragal VH, Simão A da S, Mousavi MR. Validated test models for software product lines: featured finite state machines [Internet]. Lecture Notes in Computer Science (LNCS). 2017 ; 10533 210-227.[citado 2026 jan. 27 ] Available from: https://doi.org/10.1007/978-3-319-57666-4_13 -
Vancouver
Fragal VH, Simão A da S, Mousavi MR. Validated test models for software product lines: featured finite state machines [Internet]. Lecture Notes in Computer Science (LNCS). 2017 ; 10533 210-227.[citado 2026 jan. 27 ] Available from: https://doi.org/10.1007/978-3-319-57666-4_13 - Generating checking sequences for nondeterministic finite state machines
- Generation of checking sequences using identification sets
- Evaluating test suite characteristics, cost, and effectiveness of FSM-based testing methods
- Checking completeness of tests for finite state machines
- Minimization of incompletely specified finite state machines based on distinction graphs
- A generalized model-based test generation method
- Fault coverage-driven incremental test generation
- Inferring finite state machines without reset using state identification sequences
- Generation of complete test suites from mealy input/output transition systems
- Generating complete and finite test suite for ioco: is it possible?
Informações sobre o DOI: 10.1007/978-3-319-57666-4_13 (Fonte: oaDOI API)
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