Minimization of incompletely specified finite state machines based on distinction graphs (2009)
- Authors:
- Autor USP: SIMÃO, ADENILSO DA SILVA - ICMC
- Unidade: ICMC
- Subjects: ENGENHARIA DE SOFTWARE; SISTEMAS DE INFORMAÇÃO
- Language: Inglês
- Imprenta:
- Publisher: IEEE
- Publisher place: Los Alamitos
- Date published: 2009
- ISBN: 9781424442072
- Source:
- Título: Proceedings
- Conference titles: Latin American Test Workshop - LATW
-
ABNT
ALBERTO, Alex e SIMÃO, Adenilso da Silva. Minimization of incompletely specified finite state machines based on distinction graphs. 2009, Anais.. Los Alamitos: IEEE, 2009. Disponível em: http://ieeexplore.ieee.org/xpl/tocresult.do?isnumber=4813774&isYear=2009. Acesso em: 25 jan. 2026. -
APA
Alberto, A., & Simão, A. da S. (2009). Minimization of incompletely specified finite state machines based on distinction graphs. In Proceedings. Los Alamitos: IEEE. Recuperado de http://ieeexplore.ieee.org/xpl/tocresult.do?isnumber=4813774&isYear=2009 -
NLM
Alberto A, Simão A da S. Minimization of incompletely specified finite state machines based on distinction graphs [Internet]. Proceedings. 2009 ;[citado 2026 jan. 25 ] Available from: http://ieeexplore.ieee.org/xpl/tocresult.do?isnumber=4813774&isYear=2009 -
Vancouver
Alberto A, Simão A da S. Minimization of incompletely specified finite state machines based on distinction graphs [Internet]. Proceedings. 2009 ;[citado 2026 jan. 25 ] Available from: http://ieeexplore.ieee.org/xpl/tocresult.do?isnumber=4813774&isYear=2009 - Generating checking sequences for nondeterministic finite state machines
- Generation of checking sequences using identification sets
- Evaluating test suite characteristics, cost, and effectiveness of FSM-based testing methods
- Checking completeness of tests for finite state machines
- A generalized model-based test generation method
- Fault coverage-driven incremental test generation
- Inferring finite state machines without reset using state identification sequences
- Generation of complete test suites from mealy input/output transition systems
- Generating complete and finite test suite for ioco: is it possible?
- On reducing test length for FSMs with extra states
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