A parallel hardware architecture based on node-depth encoding to solve network design problems (2014)
- Authors:
- USP affiliated authors: BONATO, VANDERLEI - ICMC ; DELBEM, ALEXANDRE CLÁUDIO BOTAZZO - ICMC
- Unidade: ICMC
- Subjects: SISTEMAS EMBUTIDOS; COMPUTAÇÃO EVOLUTIVA; ROBÓTICA
- Language: Inglês
- Imprenta:
- Publisher place: Hershey, PA, USA
- Date published: 2014
- Source:
- Título: International Journal of Natural Computing Research
- ISSN: 1947-928X
- Volume/Número/Paginação/Ano: v. 4, n. 1, p. 54-75, Jan.-Mar. 2014
-
ABNT
GOIS, Marcilyanne M. et al. A parallel hardware architecture based on node-depth encoding to solve network design problems. International Journal of Natural Computing Research, v. 4, n. Ja-Mar. 2014, p. 54-75, 2014Tradução . . Acesso em: 27 dez. 2025. -
APA
Gois, M. M., Matias, P., Perina, A. B., Bonato, V., & Delbem, A. C. B. (2014). A parallel hardware architecture based on node-depth encoding to solve network design problems. International Journal of Natural Computing Research, 4( Ja-Mar. 2014), 54-75. -
NLM
Gois MM, Matias P, Perina AB, Bonato V, Delbem ACB. A parallel hardware architecture based on node-depth encoding to solve network design problems. International Journal of Natural Computing Research. 2014 ; 4( Ja-Mar. 2014): 54-75.[citado 2025 dez. 27 ] -
Vancouver
Gois MM, Matias P, Perina AB, Bonato V, Delbem ACB. A parallel hardware architecture based on node-depth encoding to solve network design problems. International Journal of Natural Computing Research. 2014 ; 4( Ja-Mar. 2014): 54-75.[citado 2025 dez. 27 ] - Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems
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