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Artigo de periodico
Tunnel-FET evolution and applications for analog circuits (2022)
Agopian, Paula Ghedini Der ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita ; Claeys, Cor
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 16 nov. 2025.
APA
Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631
NLM
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Vancouver
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Artigo de periodico
Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications (2022)
Simoen, Eddy ; Coelho, Carlos Henrique Santos; Silva, Vanessa Cristina Pereira da; Martino, João Antonio ; Agopian, Paula Ghedini Der ; Oliveira, Alberto; Cretu, Bogdan; Veloso, Anabela
Source: Journal of Integrated Circuits and Systems. Unidades: EP, EESC
Subjects: TRANSISTORES, NANOELETRÔNICA, TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SIMOEN, Eddy et al. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.617. Acesso em: 16 nov. 2025.
APA
Simoen, E., Coelho, C. H. S., Silva, V. C. P. da, Martino, J. A., Agopian, P. G. D., Oliveira, A., et al. (2022). Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, 17( 2), 1-9. doi:10.29292/jics.v17i2.617
NLM
Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.617
Vancouver
Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17i2.617
Artigo de periodico
Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C (2022)
Silva, Vanessa Cristina Pereira da; Leal, João Vitor da Costa; Perina, Welder F; Martino, João Antonio ; Simoen, Eddy ; Veloso, A; Agopian, Paula Ghedini Der
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, NANOTECNOLOGIA, BAIXA TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Vanessa Cristina Pereira da et al. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-6, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.550. Acesso em: 16 nov. 2025.
APA
Silva, V. C. P. da, Leal, J. V. da C., Perina, W. F., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, 17( 1), 1-6. doi:10.29292/jics.v17i1.550
NLM
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17il.550
Vancouver
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 16 ] Available from: https://doi.org/10.29292/jics.v17il.550

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