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Filtros : "Journal of Integrated Circuits and Systems" "NANOELETRÔNICA" Limpar

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  • Artigo de periodico

    Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications (2022)

    Simoen, Eddy ; Coelho, Carlos Henrique Santos; Silva, Vanessa Cristina Pereira da; Martino, João Antonio ; Agopian, Paula Ghedini Der ; Oliveira, Alberto; Cretu, Bogdan; Veloso, Anabela

    Fonte: Journal of Integrated Circuits and Systems. Unidades: EP, EESC

    Assuntos: TRANSISTORES, NANOELETRÔNICA, TEMPERATURA

    Versão PublicadaAcesso à fonteDOIComo citar
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    • ABNT

      SIMOEN, Eddy et al. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.617. Acesso em: 15 nov. 2025.

    • APA

      Simoen, E., Coelho, C. H. S., Silva, V. C. P. da, Martino, J. A., Agopian, P. G. D., Oliveira, A., et al. (2022). Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications. Journal of Integrated Circuits and Systems, 17( 2), 1-9. doi:10.29292/jics.v17i2.617

    • NLM

      Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.617

    • Vancouver

      Simoen E, Coelho CHS, Silva VCP da, Martino JA, Agopian PGD, Oliveira A, Cretu B, Veloso A. Performance perspective of gate-all-around double nanosheet CMOS beyond high-speed logic applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.617

  • Artigo de periodico

    Nanowire Tunnel Field Effect Transistors at High Temperature (2013)

    Martino, Márcio Dalla Valle; Neves, Felipe Souza; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Rooyackers, Rita; Claeys, Cor

    Fonte: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: NANOELETRÔNICA

    Acesso à fonteAcesso à fonteDOIComo citar
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    • ABNT

      MARTINO, Márcio Dalla Valle et al. Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, v. 8, n. 2, p. 110-115, 2013Tradução . . Disponível em: https://doi.org/10.29292/jics.v8i2.381. Acesso em: 15 nov. 2025.

    • APA

      Martino, M. D. V., Neves, F. S., Agopian, P. G. D., Martino, J. A., Rooyackers, R., & Claeys, C. (2013). Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, 8( 2), 110-115. doi:10.29292/jics.v8i2.381

    • NLM

      Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v8i2.381

    • Vancouver

      Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v8i2.381
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