Filtros : "Journal of Solid-State Devices and Circuits" "1997" Limpar

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  • Source: Journal of Solid-State Devices and Circuits. Unidade: EP

    Assunto: CIRCUITOS INTEGRADOS

    How to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      NICOLETT, Aparecido Sirley e MARTINO, João Antonio. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, v. 5, n. 1, p. 5-8, 1997Tradução . . Acesso em: 17 nov. 2025.
    • APA

      Nicolett, A. S., & Martino, J. A. (1997). A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits, 5( 1), 5-8.
    • NLM

      Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2025 nov. 17 ]
    • Vancouver

      Nicolett AS, Martino JA. A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction. Journal of Solid-State Devices and Circuits. 1997 ;5( 1): 5-8.[citado 2025 nov. 17 ]
  • Source: Journal of Solid-State Devices and Circuits. Unidade: EP

    Assunto: CIRCUITOS INTEGRADOS

    How to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      SOARES JUNIOR, João Navarro e VAN NOIJE, Wilhelmus Adrianus Maria. E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications. Journal of Solid-State Devices and Circuits, v. 5, n. 2, p. 21-26, 1997Tradução . . Acesso em: 17 nov. 2025.
    • APA

      Soares Junior, J. N., & Van Noije, W. A. M. (1997). E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications. Journal of Solid-State Devices and Circuits, 5( 2), 21-26.
    • NLM

      Soares Junior JN, Van Noije WAM. E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications. Journal of Solid-State Devices and Circuits. 1997 ; 5( 2): 21-26.[citado 2025 nov. 17 ]
    • Vancouver

      Soares Junior JN, Van Noije WAM. E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications. Journal of Solid-State Devices and Circuits. 1997 ; 5( 2): 21-26.[citado 2025 nov. 17 ]
  • Source: Journal of Solid-State Devices and Circuits. Unidade: EP

    Assunto: CIRCUITOS INTEGRADOS

    How to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      NICOLETT, Aparecido Sirley et al. Improved channel lenght and series resistance extraction for short-channel MOSFETs suffering from mobility degradation. Journal of Solid-State Devices and Circuits, v. 5, n. 1, p. 1-4, 1997Tradução . . Acesso em: 17 nov. 2025.
    • APA

      Nicolett, A. S., Martino, J. A., Simoen, E., & Claeys, C. (1997). Improved channel lenght and series resistance extraction for short-channel MOSFETs suffering from mobility degradation. Journal of Solid-State Devices and Circuits, 5( 1), 1-4.
    • NLM

      Nicolett AS, Martino JA, Simoen E, Claeys C. Improved channel lenght and series resistance extraction for short-channel MOSFETs suffering from mobility degradation. Journal of Solid-State Devices and Circuits. 1997 ; 5( 1): 1-4.[citado 2025 nov. 17 ]
    • Vancouver

      Nicolett AS, Martino JA, Simoen E, Claeys C. Improved channel lenght and series resistance extraction for short-channel MOSFETs suffering from mobility degradation. Journal of Solid-State Devices and Circuits. 1997 ; 5( 1): 1-4.[citado 2025 nov. 17 ]

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