Filtros : "Rooyackers, Rita" Removido: "Estados Unidos" Limpar

Filtros



Refine with date range


  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS

    Versão PublicadaAcesso à fonteDOIHow to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 08 out. 2024.
    • APA

      Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631
    • NLM

      Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631
    • Vancouver

      Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631
  • Source: EUROSOI 2013. Conference titles: European Workshop on Silicon on Insulator Technology, Devices and Circuits. Unidade: EP

    Assunto: MICROELETRÔNICA

    How to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      MARTINO, João Antonio et al. Influence of interface trap density on vertical NW-TFETs with different source composition. 2013, Anais.. Paris: Institut Superieur d'Électronique, 2013. . Acesso em: 08 out. 2024.
    • APA

      Martino, J. A., Souza, F. N., Agopian, P. G. D., Rooyackers, R., Vandooren, A., Simoen, E., & Claeys, C. (2013). Influence of interface trap density on vertical NW-TFETs with different source composition. In EUROSOI 2013. Paris: Institut Superieur d'Électronique.
    • NLM

      Martino JA, Souza FN, Agopian PGD, Rooyackers R, Vandooren A, Simoen E, Claeys C. Influence of interface trap density on vertical NW-TFETs with different source composition. EUROSOI 2013. 2013 ;[citado 2024 out. 08 ]
    • Vancouver

      Martino JA, Souza FN, Agopian PGD, Rooyackers R, Vandooren A, Simoen E, Claeys C. Influence of interface trap density on vertical NW-TFETs with different source composition. EUROSOI 2013. 2013 ;[citado 2024 out. 08 ]
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: TRANSISTORES

    Acesso à fonteDOIHow to cite
    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
    • ABNT

      PAVANELLO, Marcelo Antonio et al. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 168-173, 2010Tradução . . Disponível em: https://doi.org/10.29292/jics.v5i2.324. Acesso em: 08 out. 2024.
    • APA

      Pavanello, M. A., Martino, J. A., Simoen, E., Claeys, C., Rooyackers, R., & Collaert, N. (2010). Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, 5( 2), 168-173. doi:10.29292/jics.v5i2.324
    • NLM

      Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v5i2.324
    • Vancouver

      Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 out. 08 ] Available from: https://doi.org/10.29292/jics.v5i2.324

Digital Library of Intellectual Production of Universidade de São Paulo     2012 - 2024