Filtros : "SILÍCIO" "AGOPIAN, PAULA GHEDINI DER" Removidos: "Universidade Federal de Alagoas (UFAL)" "Paez Carreño, Marcelo Nelson" Limpar

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  • Source: IEEE Transactions on Electron Devices. Unidade: EP

    Subjects: MICROELETRÔNICA, SILÍCIO

    Acesso à fonteDOIHow to cite
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    • ABNT

      OLIVEIRA, Alberto Vinicius de et al. Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes. IEEE Transactions on Electron Devices, v. 63, n. 10, p. 4031-4037, 2016Tradução . . Disponível em: https://doi.org/10.1109/ted.2016.2598288. Acesso em: 05 out. 2024.
    • APA

      Oliveira, A. V. de, Simoen, E., Mitard Jerome,, Agopian, P. G. D., Langer, R., Witters, L. J., & Martino, J. A. (2016). Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes. IEEE Transactions on Electron Devices, 63( 10), 4031-4037. doi:10.1109/ted.2016.2598288
    • NLM

      Oliveira AV de, Simoen E, Mitard Jerome, Agopian PGD, Langer R, Witters LJ, Martino JA. Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 10): 4031-4037.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2016.2598288
    • Vancouver

      Oliveira AV de, Simoen E, Mitard Jerome, Agopian PGD, Langer R, Witters LJ, Martino JA. Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 10): 4031-4037.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2016.2598288
  • Source: IEEE Electron Device Letters. Unidade: EP

    Subjects: SEMICONDUTORES, SILÍCIO

    Acesso à fonteDOIHow to cite
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    • ABNT

      OLIVEIRA, Alberto Vinicius de et al. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes. IEEE Electron Device Letters, v. 37, n. 9, p. 1092-1095, 2016Tradução . . Disponível em: https://doi.org/10.1109/led.2016.2595398. Acesso em: 05 out. 2024.
    • APA

      Oliveira, A. V. de, Simoen, E., Mitard, J., Agopian, P. G. D., Langer, R., Witters, L. J., & Martino, J. A. (2016). GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes. IEEE Electron Device Letters, 37( 9), 1092-1095. doi:10.1109/led.2016.2595398
    • NLM

      Oliveira AV de, Simoen E, Mitard J, Agopian PGD, Langer R, Witters LJ, Martino JA. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes [Internet]. IEEE Electron Device Letters. 2016 ; 37( 9): 1092-1095.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/led.2016.2595398
    • Vancouver

      Oliveira AV de, Simoen E, Mitard J, Agopian PGD, Langer R, Witters LJ, Martino JA. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes [Internet]. IEEE Electron Device Letters. 2016 ; 37( 9): 1092-1095.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/led.2016.2595398
  • Source: IEEE Transactions on Electron Devices. Unidade: EP

    Subjects: TRANSISTORES, SILÍCIO

    Acesso à fonteDOIHow to cite
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    • ABNT

      BORDALLO, Caio Cesar Mendes et al. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, v. 63, n. 7, p. 2930-2935, 2016Tradução . . Disponível em: https://doi.org/10.1109/ted.2016.2559580. Acesso em: 05 out. 2024.
    • APA

      Bordallo, C. C. M., Claeys, C., Thean, A., Simoen, E., Vandooren, A., Rooyackers, R., et al. (2016). Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, 63( 7), 2930-2935. doi:10.1109/ted.2016.2559580
    • NLM

      Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2016.2559580
    • Vancouver

      Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2016.2559580
  • Source: IEEE Transactions on Electron Devices. Unidade: EP

    Subjects: MICROELETRÔNICA, TRANSISTORES, SILÍCIO

    Acesso à fonteDOIHow to cite
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    • ABNT

      AGOPIAN, Paula Ghedini Der et al. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs. IEEE Transactions on Electron Devices, v. 62, n. Ja 2015, p. 16-22, 2015Tradução . . Disponível em: https://doi.org/10.1109/ted.2014.2367659. Acesso em: 05 out. 2024.
    • APA

      Agopian, P. G. D., Martino, J. A., Santos, S. D. dos, Rooyackers, R., & Vandoren, A. (2015). Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs. IEEE Transactions on Electron Devices, 62( Ja 2015), 16-22. doi:10.1109/ted.2014.2367659
    • NLM

      Agopian PGD, Martino JA, Santos SD dos, Rooyackers R, Vandoren A. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs [Internet]. IEEE Transactions on Electron Devices. 2015 ; 62( Ja 2015): 16-22.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2014.2367659
    • Vancouver

      Agopian PGD, Martino JA, Santos SD dos, Rooyackers R, Vandoren A. Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs [Internet]. IEEE Transactions on Electron Devices. 2015 ; 62( Ja 2015): 16-22.[citado 2024 out. 05 ] Available from: https://doi.org/10.1109/ted.2014.2367659
  • Source: Solid-State Electronics Volume 90, December 2013, Pages 155-159. Unidade: EP

    Subjects: SILÍCIO, IRRADIAÇÃO

    Acesso à fonteDOIHow to cite
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    • ABNT

      AGOPIAN, Paula Ghedini Der et al. Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices. Solid-State Electronics Volume 90, December 2013, Pages 155-159, v. 90, p. 155-159, 2013Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2013.02.037. Acesso em: 05 out. 2024.
    • APA

      Agopian, P. G. D., Bordallo, C. C. M., Simoen, E., Martino, J. A., & Claeys, C. (2013). Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices. Solid-State Electronics Volume 90, December 2013, Pages 155-159, 90, 155-159. doi:10.1016/j.sse.2013.02.037
    • NLM

      Agopian PGD, Bordallo CCM, Simoen E, Martino JA, Claeys C. Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices [Internet]. Solid-State Electronics Volume 90, December 2013, Pages 155-159. 2013 ; 90 155-159.[citado 2024 out. 05 ] Available from: https://doi.org/10.1016/j.sse.2013.02.037
    • Vancouver

      Agopian PGD, Bordallo CCM, Simoen E, Martino JA, Claeys C. Stress engineering and proton radiation influence on off-state leakage current in triple-gate SOI devices [Internet]. Solid-State Electronics Volume 90, December 2013, Pages 155-159. 2013 ; 90 155-159.[citado 2024 out. 05 ] Available from: https://doi.org/10.1016/j.sse.2013.02.037

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