The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine (2009)
- Authors:
- USP affiliated authors: SILVA, JORGE LUIZ E - ICMC ; RODA, VALENTIN OBAC - EESC
- Unidades: ICMC; EESC
- Subjects: SISTEMAS EMBUTIDOS; COMPUTAÇÃO EVOLUTIVA; ROBÓTICA
- Language: Inglês
- Imprenta:
- Source:
- Título do periódico: Proceedings
- Conference titles: The IFIP International Conference on Research and Practical Issues of Enterprise Information Systems - Confenis
-
ABNT
SILVA, Jorge Luiz e et al. The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine. 2009, Anais.. Gyor: IFIP, 2009. . Acesso em: 26 abr. 2024. -
APA
Silva, J. L. e, Costa, K. A. P. da, Obac Roda, V., & Lopes, J. J. (2009). The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine. In Proceedings. Gyor: IFIP. -
NLM
Silva JL e, Costa KAP da, Obac Roda V, Lopes JJ. The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine. Proceedings. 2009 ;[citado 2024 abr. 26 ] -
Vancouver
Silva JL e, Costa KAP da, Obac Roda V, Lopes JJ. The compiler to convert C into a dataflow graph to be executed into the ChipCflow, a dynamic dataflow machine. Proceedings. 2009 ;[citado 2024 abr. 26 ] - CHIPCFLOW: a dynamic dataflow machine using dynamic reconfigurable hardware
- The C compiler generating a source file in VHDL for a dynamic dataflow machine
- C conversion module for a dynamic data flow tool
- A benchmark approach for compilers in reconfigurable hardware
- Research and partial analysis of overhead of a partition model for a partially reconfigurable hardware in a data-driven machine-chicflow
- A partition model using partial reconfigurable hardware for chipCflow project
- Tag management in a reconfigurable tagged-token dataflow architecture
- A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
- Execution of algorithms using a dynamic dataflow model for reconfigurable hardware: a purpose for matching data
- RtrASSoc51 - adaptable superscalar reconfigurable programmable system on chip: the reconfigurable tools for DSR a development system
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