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Filtros : "IEEE Transactions on Electron Devices" "Thean, Aaron" Limpar

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  • Artigo de periodico

    Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source (2016)

    Neves, Felipe S; Agopian, Paula Ghedini Der ; Cretu, B; Rooyackers, Rita; Vandooren, A; Simoen, Eddy ; Thean, Aaron; Martino, João Antonio

    Fonte: IEEE Transactions on Electron Devices. Unidade: EP

    Assunto: SEMICONDUTORES

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    • ABNT

      NEVES, Felipe S et al. Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source. IEEE Transactions on Electron Devices, v. 63, n. 4, p. 1658-1665, 2016Tradução . . Disponível em: https://doi.org/10.1109/ted.2016.2533360. Acesso em: 18 nov. 2025.

    • APA

      Neves, F. S., Agopian, P. G. D., Cretu, B., Rooyackers, R., Vandooren, A., Simoen, E., et al. (2016). Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source. IEEE Transactions on Electron Devices, 63( 4), 1658-1665. doi:10.1109/ted.2016.2533360

    • NLM

      Neves FS, Agopian PGD, Cretu B, Rooyackers R, Vandooren A, Simoen E, Thean A, Martino JA. Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 4): 1658-1665.[citado 2025 nov. 18 ] Available from: https://doi.org/10.1109/ted.2016.2533360

    • Vancouver

      Neves FS, Agopian PGD, Cretu B, Rooyackers R, Vandooren A, Simoen E, Thean A, Martino JA. Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 4): 1658-1665.[citado 2025 nov. 18 ] Available from: https://doi.org/10.1109/ted.2016.2533360

  • Artigo de periodico

    Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective (2016)

    Bordallo, Caio Cesar Mendes ; Claeys, Cor ; Thean, Aaron; Simoen, Eddy ; Vandooren, A; Rooyackers, Rita; Agopian, Paula Ghedini Der ; Sivieri, Victor de Bodt; Martino, João Antonio

    Fonte: IEEE Transactions on Electron Devices. Unidade: EP

    Assuntos: TRANSISTORES, SILÍCIO

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    • ABNT

      BORDALLO, Caio Cesar Mendes et al. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, v. 63, n. 7, p. 2930-2935, 2016Tradução . . Disponível em: https://doi.org/10.1109/ted.2016.2559580. Acesso em: 18 nov. 2025.

    • APA

      Bordallo, C. C. M., Claeys, C., Thean, A., Simoen, E., Vandooren, A., Rooyackers, R., et al. (2016). Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective. IEEE Transactions on Electron Devices, 63( 7), 2930-2935. doi:10.1109/ted.2016.2559580

    • NLM

      Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2025 nov. 18 ] Available from: https://doi.org/10.1109/ted.2016.2559580

    • Vancouver

      Bordallo CCM, Claeys C, Thean A, Simoen E, Vandooren A, Rooyackers R, Agopian PGD, Sivieri V de B, Martino JA. Impact of the NW-TFET Diameter on the Efficiency and the Intrinsic Voltage Gain From a Conduction Regime Perspective [Internet]. IEEE Transactions on Electron Devices. 2016 ; 63( 7): 2930-2935.[citado 2025 nov. 18 ] Available from: https://doi.org/10.1109/ted.2016.2559580
  • 1

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