A parallel hardware architecture for scale and rotation invariant feature detection (2008)
Bonato, Vanderlei 
; Marques, Eduardo ; Constantinides, George A.
Fonte: IEEE Transactions on Circuits and Systems for Video Technology. Unidade: ICMC
Assuntos: ARQUITETURA E ORGANIZAÇÃO DE COMPUTADORES, HARDWARE, SISTEMAS DISTRIBUÍDOS, PROGRAMAÇÃO CONCORRENTE, SISTEMAS EMBUTIDOS, COMPUTAÇÃO EVOLUTIVA
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BONATO, Vanderlei e MARQUES, Eduardo e CONSTANTINIDES, George A. A parallel hardware architecture for scale and rotation invariant feature detection. IEEE Transactions on Circuits and Systems for Video Technology, v. 18, n. 12, p. 1703-1712, 2008Tradução . . Disponível em: http://ieeexplore.ieee.org/stamp/stamp.do?arnumber=4675857&isnumber=4675855. Acesso em: 09 nov. 2025.APA
Bonato, V., Marques, E., & Constantinides, G. A. (2008). A parallel hardware architecture for scale and rotation invariant feature detection. IEEE Transactions on Circuits and Systems for Video Technology, 18( 12), 1703-1712. Recuperado de http://ieeexplore.ieee.org/stamp/stamp.do?arnumber=4675857&isnumber=4675855NLM
Bonato V, Marques E, Constantinides GA. A parallel hardware architecture for scale and rotation invariant feature detection [Internet]. IEEE Transactions on Circuits and Systems for Video Technology. 2008 ; 18( 12): 1703-1712.[citado 2025 nov. 09 ] Available from: http://ieeexplore.ieee.org/stamp/stamp.do?arnumber=4675857&isnumber=4675855Vancouver
Bonato V, Marques E, Constantinides GA. A parallel hardware architecture for scale and rotation invariant feature detection [Internet]. IEEE Transactions on Circuits and Systems for Video Technology. 2008 ; 18( 12): 1703-1712.[citado 2025 nov. 09 ] Available from: http://ieeexplore.ieee.org/stamp/stamp.do?arnumber=4675857&isnumber=4675855
