Source: Proceedings. Conference titles: Ieee International Conference on Microelectronic Test Structures. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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SANTOS FILHO, Sebastião Gomes dos e SWART, Jacobus Willibrordus. Experimental measurement technique of interconnection rd delay for integrated circuits using the step voltage response. 1989, Anais.. New York: Ieee, 1989. . Acesso em: 21 jul. 2024.APA
Santos Filho, S. G. dos, & Swart, J. W. (1989). Experimental measurement technique of interconnection rd delay for integrated circuits using the step voltage response. In Proceedings. New York: Ieee.NLM
Santos Filho SG dos, Swart JW. Experimental measurement technique of interconnection rd delay for integrated circuits using the step voltage response. Proceedings. 1989 ;[citado 2024 jul. 21 ]Vancouver
Santos Filho SG dos, Swart JW. Experimental measurement technique of interconnection rd delay for integrated circuits using the step voltage response. Proceedings. 1989 ;[citado 2024 jul. 21 ]