An adjustable size FPGA implementation for an artificial neural network (2001)
Wolf, Denis Fernando 
; Romero, Roseli Aparecida Francelin ; Marques, Eduardo
Source: Proceedings. Conference titles: International Conference on Artificial Intelligence. Unidade: ICMC
Assunto: REDES NEURAIS
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ABNT
WOLF, Denis Fernando e ROMERO, Roseli Aparecida Francelin e MARQUES, Eduardo. An adjustable size FPGA implementation for an artificial neural network. 2001, Anais.. Las Vegas: CSREA, 2001. . Acesso em: 15 fev. 2026.APA
Wolf, D. F., Romero, R. A. F., & Marques, E. (2001). An adjustable size FPGA implementation for an artificial neural network. In Proceedings. Las Vegas: CSREA.NLM
Wolf DF, Romero RAF, Marques E. An adjustable size FPGA implementation for an artificial neural network. Proceedings. 2001 ;[citado 2026 fev. 15 ]Vancouver
Wolf DF, Romero RAF, Marques E. An adjustable size FPGA implementation for an artificial neural network. Proceedings. 2001 ;[citado 2026 fev. 15 ]
