A methodology to improve yield in analog circuits by using geometric programming (2010)
Fonte: Proceedings of the SBCCI'10. Nome do evento: Symposium on integrated circuits and systems design. Unidade: EP
Assuntos: CIRCUITOS ANALÓGICOS, OTIMIZAÇÃO MATEMÁTICA
ABNT
SÁENZ, Jorge Johanny et al. A methodology to improve yield in analog circuits by using geometric programming. 2010, Anais.. São Paulo: Escola Politécnica, Universidade de São Paulo, 2010. . Acesso em: 03 nov. 2025.APA
Sáenz, J. J., Roa, E., Ayala Pabón, A., & Van Noije, W. A. M. (2010). A methodology to improve yield in analog circuits by using geometric programming. In Proceedings of the SBCCI'10. São Paulo: Escola Politécnica, Universidade de São Paulo.NLM
Sáenz JJ, Roa E, Ayala Pabón A, Van Noije WAM. A methodology to improve yield in analog circuits by using geometric programming. Proceedings of the SBCCI'10. 2010 ;[citado 2025 nov. 03 ]Vancouver
Sáenz JJ, Roa E, Ayala Pabón A, Van Noije WAM. A methodology to improve yield in analog circuits by using geometric programming. Proceedings of the SBCCI'10. 2010 ;[citado 2025 nov. 03 ]
