ProfCounter: line-level cycle counter for Xilinx OpenCL high-level synthesis (2019)
Perina, André Bannwart 
; Becker, Jürgen ; Bonato, Vanderlei
Source: Proceedings. Conference titles: IEEE International Conference on Electronics, Circuits and Systems - ICECS. Unidade: ICMC
Subjects: COMPUTAÇÃO RECONFIGURÁVEL, HARDWARE, MICROPROGRAMAÇÃO
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ABNT
PERINA, André Bannwart e BECKER, Jürgen e BONATO, Vanderlei. ProfCounter: line-level cycle counter for Xilinx OpenCL high-level synthesis. 2019, Anais.. Los Alamitos: IEEE, 2019. Disponível em: https://doi.org/10.1109/ICECS46596.2019.8964669. Acesso em: 29 jun. 2025.APA
Perina, A. B., Becker, J., & Bonato, V. (2019). ProfCounter: line-level cycle counter for Xilinx OpenCL high-level synthesis. In Proceedings. Los Alamitos: IEEE. doi:10.1109/ICECS46596.2019.8964669NLM
Perina AB, Becker J, Bonato V. ProfCounter: line-level cycle counter for Xilinx OpenCL high-level synthesis [Internet]. Proceedings. 2019 ;[citado 2025 jun. 29 ] Available from: https://doi.org/10.1109/ICECS46596.2019.8964669Vancouver
Perina AB, Becker J, Bonato V. ProfCounter: line-level cycle counter for Xilinx OpenCL high-level synthesis [Internet]. Proceedings. 2019 ;[citado 2025 jun. 29 ] Available from: https://doi.org/10.1109/ICECS46596.2019.8964669
