ReP USP - Resultado da busca

Artigo de periodico
Application-oriented cache memory configuration for energy efficiency in multi-cores (2015)
Silva, Bruno de Abreu; Cuminato, Lucas A; Delbem, Alexandre Cláudio Botazzo ; Diniz, Pedro C; Bonato, Vanderlei
Source: IET Computers and Digital Techniques. Unidade: ICMC
Subjects: SISTEMAS EMBUTIDOS, COMPUTAÇÃO EVOLUTIVA, ROBÓTICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Bruno de Abreu et al. Application-oriented cache memory configuration for energy efficiency in multi-cores. IET Computers and Digital Techniques, v. Fe 2015, n. 1, p. 73-81, 2015Tradução . . Disponível em: https://doi.org/10.1049/iet-cdt.2014.0091. Acesso em: 09 nov. 2024.
APA
Silva, B. de A., Cuminato, L. A., Delbem, A. C. B., Diniz, P. C., & Bonato, V. (2015). Application-oriented cache memory configuration for energy efficiency in multi-cores. IET Computers and Digital Techniques, Fe 2015( 1), 73-81. doi:10.1049/iet-cdt.2014.0091
NLM
Silva B de A, Cuminato LA, Delbem ACB, Diniz PC, Bonato V. Application-oriented cache memory configuration for energy efficiency in multi-cores [Internet]. IET Computers and Digital Techniques. 2015 ; Fe 2015( 1): 73-81.[citado 2024 nov. 09 ] Available from: https://doi.org/10.1049/iet-cdt.2014.0091
Vancouver
Silva B de A, Cuminato LA, Delbem ACB, Diniz PC, Bonato V. Application-oriented cache memory configuration for energy efficiency in multi-cores [Internet]. IET Computers and Digital Techniques. 2015 ; Fe 2015( 1): 73-81.[citado 2024 nov. 09 ] Available from: https://doi.org/10.1049/iet-cdt.2014.0091
Trabalho de evento
Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems (2015)
Silva, Bruno; Delbem, Alexandre Cláudio Botazzo ; Bonato, Vanderlei ; Diniz, Pedro C
Source: Proceedings. Conference titles: International Conference on ReConFigurable Computing and FPGAs - ReConFig 2015. Unidade: ICMC
Subjects: SISTEMAS EMBUTIDOS, COMPUTAÇÃO EVOLUTIVA, ROBÓTICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Bruno et al. Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems. 2015, Anais.. Piscataway, NJ: IEEE, 2015. Disponível em: https://doi.org/10.1109/ReConFig.2015.7393355. Acesso em: 09 nov. 2024.
APA
Silva, B., Delbem, A. C. B., Bonato, V., & Diniz, P. C. (2015). Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems. In Proceedings. Piscataway, NJ: IEEE. doi:10.1109/ReConFig.2015.7393355
NLM
Silva B, Delbem ACB, Bonato V, Diniz PC. Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems [Internet]. Proceedings. 2015 ;[citado 2024 nov. 09 ] Available from: https://doi.org/10.1109/ReConFig.2015.7393355
Vancouver
Silva B, Delbem ACB, Bonato V, Diniz PC. Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems [Internet]. Proceedings. 2015 ;[citado 2024 nov. 09 ] Available from: https://doi.org/10.1109/ReConFig.2015.7393355
Trabalho de evento
Run-time cache configuration for the LEON-3 embedded processor (2015)
Silva, Bruno A; Cuminato, Lucas A; Bonato, Vanderlei ; Diniz, Pedro C
Source: Proceedings. Conference titles: Symposium on Integrated Circuits and Systems Design - SBCCI. Unidade: ICMC
Subjects: SISTEMAS EMBUTIDOS, COMPUTAÇÃO EVOLUTIVA, ROBÓTICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Bruno A et al. Run-time cache configuration for the LEON-3 embedded processor. 2015, Anais.. New York: ACM, 2015. Disponível em: https://doi.org/10.1145/2800986.2801026. Acesso em: 09 nov. 2024.
APA
Silva, B. A., Cuminato, L. A., Bonato, V., & Diniz, P. C. (2015). Run-time cache configuration for the LEON-3 embedded processor. In Proceedings. New York: ACM. doi:10.1145/2800986.2801026
NLM
Silva BA, Cuminato LA, Bonato V, Diniz PC. Run-time cache configuration for the LEON-3 embedded processor [Internet]. Proceedings. 2015 ;[citado 2024 nov. 09 ] Available from: https://doi.org/10.1145/2800986.2801026
Vancouver
Silva BA, Cuminato LA, Bonato V, Diniz PC. Run-time cache configuration for the LEON-3 embedded processor [Internet]. Proceedings. 2015 ;[citado 2024 nov. 09 ] Available from: https://doi.org/10.1145/2800986.2801026

USP Schools

ReP

Filtros

Authors