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Filtros : "Floating-point" Limpar

Filtros

Artigo de periodico
A Faddeev systolic array for EKF-SLAM and its arithmetic data representation impact on FPGA (2018)
Rosa, Leandro de Souza; Dasu, Aravind; Diniz, Pedro C.; Bonato, Vanderlei
Source: Journal of Signal Processing Systems. Unidade: ICMC
Subjects: COMPUTAÇÃO RECONFIGURÁVEL, SISTEMAS EMBUTIDOS, ROBÓTICA, COMPUTAÇÃO EVOLUTIVA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
ROSA, Leandro de Souza et al. A Faddeev systolic array for EKF-SLAM and its arithmetic data representation impact on FPGA. Journal of Signal Processing Systems, v. 90, n. 3, p. 357-369, 2018Tradução . . Disponível em: https://doi.org/10.1007/s11265-017-1243-9. Acesso em: 03 jan. 2026.
APA
Rosa, L. de S., Dasu, A., Diniz, P. C., & Bonato, V. (2018). A Faddeev systolic array for EKF-SLAM and its arithmetic data representation impact on FPGA. Journal of Signal Processing Systems, 90( 3), 357-369. doi:10.1007/s11265-017-1243-9
NLM
Rosa L de S, Dasu A, Diniz PC, Bonato V. A Faddeev systolic array for EKF-SLAM and its arithmetic data representation impact on FPGA [Internet]. Journal of Signal Processing Systems. 2018 ; 90( 3): 357-369.[citado 2026 jan. 03 ] Available from: https://doi.org/10.1007/s11265-017-1243-9
Vancouver
Rosa L de S, Dasu A, Diniz PC, Bonato V. A Faddeev systolic array for EKF-SLAM and its arithmetic data representation impact on FPGA [Internet]. Journal of Signal Processing Systems. 2018 ; 90( 3): 357-369.[citado 2026 jan. 03 ] Available from: https://doi.org/10.1007/s11265-017-1243-9
Artigo de periodico
Design and analysis of evolutionary bit-length optimization algorithms for floating to fixed-point conversion (2016)
Rosa, L. S; Delbem, Alexandre Cláudio Botazzo ; Toledo, Claudio Fabiano Motta ; Bonato, Vanderlei
Source: Applied Soft Computing. Unidade: ICMC
Subjects: SISTEMAS EMBUTIDOS, COMPUTAÇÃO EVOLUTIVA, ROBÓTICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
ROSA, L. S et al. Design and analysis of evolutionary bit-length optimization algorithms for floating to fixed-point conversion. Applied Soft Computing, v. 49, p. 447-461, 2016Tradução . . Disponível em: https://doi.org/10.1016/j.asoc.2016.08.035. Acesso em: 03 jan. 2026.
APA
Rosa, L. S., Delbem, A. C. B., Toledo, C. F. M., & Bonato, V. (2016). Design and analysis of evolutionary bit-length optimization algorithms for floating to fixed-point conversion. Applied Soft Computing, 49, 447-461. doi:10.1016/j.asoc.2016.08.035
NLM
Rosa LS, Delbem ACB, Toledo CFM, Bonato V. Design and analysis of evolutionary bit-length optimization algorithms for floating to fixed-point conversion [Internet]. Applied Soft Computing. 2016 ; 49 447-461.[citado 2026 jan. 03 ] Available from: https://doi.org/10.1016/j.asoc.2016.08.035
Vancouver
Rosa LS, Delbem ACB, Toledo CFM, Bonato V. Design and analysis of evolutionary bit-length optimization algorithms for floating to fixed-point conversion [Internet]. Applied Soft Computing. 2016 ; 49 447-461.[citado 2026 jan. 03 ] Available from: https://doi.org/10.1016/j.asoc.2016.08.035

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