Low temperature operation of graded-channel SOI nMOSFETs for analog applications (2002)
Pavanello, Marcelo Antonio 
; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Flandre, Denis
Source: Journal de Physique IV. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS MOS
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ABNT
PAVANELLO, Marcelo Antonio et al. Low temperature operation of graded-channel SOI nMOSFETs for analog applications. Journal de Physique IV, v. 12, n. 3, 2002Tradução . . Disponível em: https://doi.org/10.1051/jp420020030. Acesso em: 15 nov. 2024.APA
Pavanello, M. A., Agopian, P. G. D., Martino, J. A., & Flandre, D. (2002). Low temperature operation of graded-channel SOI nMOSFETs for analog applications. Journal de Physique IV, 12( 3). doi:10.1051/jp420020030NLM
Pavanello MA, Agopian PGD, Martino JA, Flandre D. Low temperature operation of graded-channel SOI nMOSFETs for analog applications [Internet]. Journal de Physique IV. 2002 ;12( 3):[citado 2024 nov. 15 ] Available from: https://doi.org/10.1051/jp420020030Vancouver
Pavanello MA, Agopian PGD, Martino JA, Flandre D. Low temperature operation of graded-channel SOI nMOSFETs for analog applications [Internet]. Journal de Physique IV. 2002 ;12( 3):[citado 2024 nov. 15 ] Available from: https://doi.org/10.1051/jp420020030
