Design and analysis of dcfl and scfl logic gates in 'GA''AS' mesfet technology (1996)
Source: Proceedings. Conference titles: Conference of the Brazilian Microelectronics Society. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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DE MARCO, W M S et al. Design and analysis of dcfl and scfl logic gates in 'GA''AS' mesfet technology. 1996, Anais.. São Paulo: Sbmicro, 1996. . Acesso em: 16 jul. 2024.APA
De Marco, W. M. S., Custodio, R. M. F., Swart, J. W., & Van Noije, W. A. M. (1996). Design and analysis of dcfl and scfl logic gates in 'GA''AS' mesfet technology. In Proceedings. São Paulo: Sbmicro.NLM
De Marco WMS, Custodio RMF, Swart JW, Van Noije WAM. Design and analysis of dcfl and scfl logic gates in 'GA''AS' mesfet technology. Proceedings. 1996 ;[citado 2024 jul. 16 ]Vancouver
De Marco WMS, Custodio RMF, Swart JW, Van Noije WAM. Design and analysis of dcfl and scfl logic gates in 'GA''AS' mesfet technology. Proceedings. 1996 ;[citado 2024 jul. 16 ]