Scaling up loop pipelining for high-level synthesis: a non-iterative approach (2018)
Rosa, Leandro de Souza 
; Bonato, Vanderlei ; Bouganis, Christos-Savvas
Source: Proceedings. Conference titles: International Conference on Field-Programmable Technology - FPT. Unidade: ICMC
Subjects: HARDWARE, ANÁLISE DE DESEMPENHO
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ABNT
ROSA, Leandro de Souza e BONATO, Vanderlei e BOUGANIS, Christos-Savvas. Scaling up loop pipelining for high-level synthesis: a non-iterative approach. 2018, Anais.. Piscataway: IEEE, 2018. Disponível em: https://doi.org/10.1109/FPT.2018.00020. Acesso em: 29 nov. 2025.APA
Rosa, L. de S., Bonato, V., & Bouganis, C. -S. (2018). Scaling up loop pipelining for high-level synthesis: a non-iterative approach. In Proceedings. Piscataway: IEEE. doi:10.1109/FPT.2018.00020NLM
Rosa L de S, Bonato V, Bouganis C-S. Scaling up loop pipelining for high-level synthesis: a non-iterative approach [Internet]. Proceedings. 2018 ;[citado 2025 nov. 29 ] Available from: https://doi.org/10.1109/FPT.2018.00020Vancouver
Rosa L de S, Bonato V, Bouganis C-S. Scaling up loop pipelining for high-level synthesis: a non-iterative approach [Internet]. Proceedings. 2018 ;[citado 2025 nov. 29 ] Available from: https://doi.org/10.1109/FPT.2018.00020
