Filtros : "Financiado pela FCT" "Electronics" Removidos: "Motheo, Artur de Jesus" "EE-ENS" Limpar

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  • Source: Electronics. Unidade: ICMC

    Subjects: EQUAÇÕES DIFERENCIAIS ORDINÁRIAS, HARDWARE

    Versão PublicadaAcesso à fonteDOIHow to cite
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    • ABNT

      SOUZA JUNIOR, Carlos Alberto Oliveira de et al. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture. Electronics, v. 9, n. 5, p. 1-14, 2020Tradução . . Disponível em: https://doi.org/10.3390/electronics9050843. Acesso em: 31 out. 2024.
    • APA

      Souza Junior, C. A. O. de, Bispo, J., Cardoso, J. M. P., Diniz, P. C., & Marques, E. (2020). Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture. Electronics, 9( 5), 1-14. doi:10.3390/electronics9050843
    • NLM

      Souza Junior CAO de, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture [Internet]. Electronics. 2020 ; 9( 5): 1-14.[citado 2024 out. 31 ] Available from: https://doi.org/10.3390/electronics9050843
    • Vancouver

      Souza Junior CAO de, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-based hardware designs for QR decomposition for solving stiff ODE numerical methods using the HARP hybrid architecture [Internet]. Electronics. 2020 ; 9( 5): 1-14.[citado 2024 out. 31 ] Available from: https://doi.org/10.3390/electronics9050843

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