Analytical modeling of the substrate influences on accumulation-mode SOI pMOSFETs at room temperature and at liquid nitrogen temperature (1997)
- Authors:
- Autor USP: MARTINO, JOÃO ANTONIO - EP
- Unidade: EP
- DOI: 10.1016/s0038-1101(97)00071-3
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Source:
- Título do periódico: Solid-State Electronics
- Volume/Número/Paginação/Ano: v. 41, n. 9, p. 1241-1246, 1997
- Este periódico é de assinatura
- Este artigo NÃO é de acesso aberto
- Cor do Acesso Aberto: closed
-
ABNT
PAVANELLO, Marcelo Antonio e MARTINO, João Antonio e COLINGE, Jean-Pierre. Analytical modeling of the substrate influences on accumulation-mode SOI pMOSFETs at room temperature and at liquid nitrogen temperature. Solid-State Electronics, v. 41, n. 9, p. 1241-1246, 1997Tradução . . Disponível em: https://doi.org/10.1016/s0038-1101(97)00071-3. Acesso em: 23 abr. 2024. -
APA
Pavanello, M. A., Martino, J. A., & Colinge, J. -P. (1997). Analytical modeling of the substrate influences on accumulation-mode SOI pMOSFETs at room temperature and at liquid nitrogen temperature. Solid-State Electronics, 41( 9), 1241-1246. doi:10.1016/s0038-1101(97)00071-3 -
NLM
Pavanello MA, Martino JA, Colinge J-P. Analytical modeling of the substrate influences on accumulation-mode SOI pMOSFETs at room temperature and at liquid nitrogen temperature [Internet]. Solid-State Electronics. 1997 ; 41( 9): 1241-1246.[citado 2024 abr. 23 ] Available from: https://doi.org/10.1016/s0038-1101(97)00071-3 -
Vancouver
Pavanello MA, Martino JA, Colinge J-P. Analytical modeling of the substrate influences on accumulation-mode SOI pMOSFETs at room temperature and at liquid nitrogen temperature [Internet]. Solid-State Electronics. 1997 ; 41( 9): 1241-1246.[citado 2024 abr. 23 ] Available from: https://doi.org/10.1016/s0038-1101(97)00071-3 - Temperature influences on the drain leakage current behavior in graded-channel SOI nMOSFETs
- Projeto de processos de fabricação avançados aplicáveis nas tecnologias CMOS micrométricas
- Analysis of the linear kink effect in partially depleted SOI nMOSFETs
- Simple method to extract the length dependent mobility degradation factor at 77 K
- Mobility degradation influence on the SOI MOSFET channel length extraction at 77K
- Low temperature and channel engineering influence on harmonic distortion of soi nmosfets for analog applications
- Analysis of the capacitance vs. voltage in graded channel SOI capacitor
- A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
Informações sobre o DOI: 10.1016/s0038-1101(97)00071-3 (Fonte: oaDOI API)
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