ReP USP - Resultado da busca

Artigo de periodico
Simulation and fabrication of surface-modified glass coverslips to enhance energy harvesting on indoor MOS solar cells (2024)
Louzada, Gabriel Oliveira ; Izumi, Fabio ; Watanabe, Marcos Norio ; Santos Filho, Sebastião Gomes dos
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: CÉLULAS SOLARES, ENERGIA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
LOUZADA, Gabriel Oliveira et al. Simulation and fabrication of surface-modified glass coverslips to enhance energy harvesting on indoor MOS solar cells. Journal of Integrated Circuits and Systems, v. 19, n. 3, p. 1-7, 2024Tradução . . Disponível em: https://doi.org/10.29292/jics.v19i3.864. Acesso em: 15 nov. 2025.
APA
Louzada, G. O., Izumi, F., Watanabe, M. N., & Santos Filho, S. G. dos. (2024). Simulation and fabrication of surface-modified glass coverslips to enhance energy harvesting on indoor MOS solar cells. Journal of Integrated Circuits and Systems, 19( 3), 1-7. doi:10.29292/jics.v19i3.864
NLM
Louzada GO, Izumi F, Watanabe MN, Santos Filho SG dos. Simulation and fabrication of surface-modified glass coverslips to enhance energy harvesting on indoor MOS solar cells [Internet]. Journal of Integrated Circuits and Systems. 2024 ; 19( 3): 1-7.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v19i3.864
Vancouver
Louzada GO, Izumi F, Watanabe MN, Santos Filho SG dos. Simulation and fabrication of surface-modified glass coverslips to enhance energy harvesting on indoor MOS solar cells [Internet]. Journal of Integrated Circuits and Systems. 2024 ; 19( 3): 1-7.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v19i3.864
Artigo de periodico
Fractional-order MOS capacitor: experimental results and Monte Carlo analysis (2023)
Fernandes, Lucas Almir dos Santos; Alayo Chávez, Marco Isaías ; Martino, João Antonio
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: FRACTAIS, SIMULAÇÃO, AVALIAÇÃO DE DESEMPENHO
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ABNT
FERNANDES, Lucas Almir dos Santos e ALAYO CHÁVEZ, Marco Isaías e MARTINO, João Antonio. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-5, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.660. Acesso em: 15 nov. 2025.
APA
Fernandes, L. A. dos S., Alayo Chávez, M. I., & Martino, J. A. (2023). Fractional-order MOS capacitor: experimental results and Monte Carlo analysis. Journal of Integrated Circuits and Systems, 18( 1), 1-5. doi:10.29292/jics.v18i1.660
NLM
Fernandes LA dos S, Alayo Chávez MI, Martino JA. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-5.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v18i1.660
Vancouver
Fernandes LA dos S, Alayo Chávez MI, Martino JA. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-5.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v18i1.660
Artigo de periodico
Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data (2023)
Toledo, Rodrigo do Nascimento; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA
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ABNT
TOLEDO, Rodrigo do Nascimento e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-6, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.653. Acesso em: 15 nov. 2025.
APA
Toledo, R. do N., Martino, J. A., & Agopian, P. G. D. (2023). Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, 18( 1), 1-6. doi:10.29292/jics.v18il.653
NLM
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Vancouver
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Artigo de periodico
Reconfigurable SOI-MOSFET: past, present and future applications (2022)
Rangel, Ricardo Cardoso; Sasaki, Kátia Regina Akemi ; Martino, João Antonio
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, SENSOR, CIRCUITOS INTEGRADOS MOS
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ABNT
RANGEL, Ricardo Cardoso e SASAKI, Kátia Regina Akemi e MARTINO, João Antonio. Reconfigurable SOI-MOSFET: past, present and future applications. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.626. Acesso em: 15 nov. 2025.
APA
Rangel, R. C., Sasaki, K. R. A., & Martino, J. A. (2022). Reconfigurable SOI-MOSFET: past, present and future applications. Journal of Integrated Circuits and Systems, 17( 2), 1-9. doi:10.29292/jics.v17i2.626
NLM
Rangel RC, Sasaki KRA, Martino JA. Reconfigurable SOI-MOSFET: past, present and future applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.626
Vancouver
Rangel RC, Sasaki KRA, Martino JA. Reconfigurable SOI-MOSFET: past, present and future applications [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-9.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.626
Artigo de periodico
Tunnel-FET evolution and applications for analog circuits (2022)
Agopian, Paula Ghedini Der ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita ; Claeys, Cor
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 15 nov. 2025.
APA
Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631
NLM
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Vancouver
Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17i2.631
Artigo de periodico
Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C (2022)
Silva, Vanessa Cristina Pereira da; Leal, João Vitor da Costa; Perina, Welder F; Martino, João Antonio ; Simoen, Eddy ; Veloso, A; Agopian, Paula Ghedini Der
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, NANOTECNOLOGIA, BAIXA TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Vanessa Cristina Pereira da et al. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-6, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.550. Acesso em: 15 nov. 2025.
APA
Silva, V. C. P. da, Leal, J. V. da C., Perina, W. F., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, 17( 1), 1-6. doi:10.29292/jics.v17i1.550
NLM
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17il.550
Vancouver
Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2025 nov. 15 ] Available from: https://doi.org/10.29292/jics.v17il.550

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