Temperature influence on analog parameters of vertical nanowire transistors (2025)
Fonte: Solid State Electronics. Unidades: EESC, EP
Assunto: ENGENHARIA ELÉTRICA
ABNT
VENUTO, Vanessa Cristina Pereira da Silva et al. Temperature influence on analog parameters of vertical nanowire transistors. Solid State Electronics, v. 229, p. 1-5, 2025Tradução . . Disponível em: https://dx.doi.org/10.1016/j.sse.2025.109206. Acesso em: 27 nov. 2025.APA
Venuto, V. C. P. da S., Ribeiro, A. dos R., Martino, J. A., Veloso, A., Horiguchi, N., & Agopian, P. G. D. (2025). Temperature influence on analog parameters of vertical nanowire transistors. Solid State Electronics, 229, 1-5. doi:10.1016/j.sse.2025.109206NLM
Venuto VCP da S, Ribeiro A dos R, Martino JA, Veloso A, Horiguchi N, Agopian PGD. Temperature influence on analog parameters of vertical nanowire transistors [Internet]. Solid State Electronics. 2025 ; 229 1-5.[citado 2025 nov. 27 ] Available from: https://dx.doi.org/10.1016/j.sse.2025.109206Vancouver
Venuto VCP da S, Ribeiro A dos R, Martino JA, Veloso A, Horiguchi N, Agopian PGD. Temperature influence on analog parameters of vertical nanowire transistors [Internet]. Solid State Electronics. 2025 ; 229 1-5.[citado 2025 nov. 27 ] Available from: https://dx.doi.org/10.1016/j.sse.2025.109206
