Filtros : "CIRCUITOS INTEGRADOS" "2013" Limpar

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  • Source: International Journal of Computer Architecture Education. Unidade: EP

    Subjects: ENSINO E APRENDIZAGEM, CIRCUITOS INTEGRADOS

    Acesso à fonteHow to cite
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    • ABNT

      OLIVEIRA, A. M et al. A teaching methodology based on the ALU 8bit RISC design VLSI full custom for classes on computer architecture and digital electronic. International Journal of Computer Architecture Education, v. 2, n. 1, p. 25-28, 2013Tradução . . Disponível em: http://www2.sbc.org.br/ceacpad/ijcae/v2_n1_dec_2013/IJCAE_v2_n1_dez_2013_paper_7_vf.pdf. Acesso em: 15 nov. 2025.
    • APA

      Oliveira, A. M., Beingolea Garay, J. R., Rodrigues, A. C. L., Kofuji, S. T., & Justo Filho, J. F. (2013). A teaching methodology based on the ALU 8bit RISC design VLSI full custom for classes on computer architecture and digital electronic. International Journal of Computer Architecture Education, 2( 1), 25-28. Recuperado de http://www2.sbc.org.br/ceacpad/ijcae/v2_n1_dec_2013/IJCAE_v2_n1_dez_2013_paper_7_vf.pdf
    • NLM

      Oliveira AM, Beingolea Garay JR, Rodrigues ACL, Kofuji ST, Justo Filho JF. A teaching methodology based on the ALU 8bit RISC design VLSI full custom for classes on computer architecture and digital electronic [Internet]. International Journal of Computer Architecture Education. 2013 ;2( 1): 25-28.[citado 2025 nov. 15 ] Available from: http://www2.sbc.org.br/ceacpad/ijcae/v2_n1_dec_2013/IJCAE_v2_n1_dez_2013_paper_7_vf.pdf
    • Vancouver

      Oliveira AM, Beingolea Garay JR, Rodrigues ACL, Kofuji ST, Justo Filho JF. A teaching methodology based on the ALU 8bit RISC design VLSI full custom for classes on computer architecture and digital electronic [Internet]. International Journal of Computer Architecture Education. 2013 ;2( 1): 25-28.[citado 2025 nov. 15 ] Available from: http://www2.sbc.org.br/ceacpad/ijcae/v2_n1_dec_2013/IJCAE_v2_n1_dez_2013_paper_7_vf.pdf
  • Conference titles: Symposium on Integrated Circuits and Systems Design - SBCCI. Unidade: EESC

    Subjects: MÉTODO DE MONTE CARLO, CIRCUITOS INTEGRADOS

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    • ABNT

      ISHIBE, Eder Issao e SOARES JUNIOR, João Navarro. A CMOS bandgap reference circuit with a temperature coefficient adjustment block. 2013, Anais.. Piscataway: IEEE, 2013. . Acesso em: 15 nov. 2025.
    • APA

      Ishibe, E. I., & Soares Junior, J. N. (2013). A CMOS bandgap reference circuit with a temperature coefficient adjustment block. In . Piscataway: IEEE.
    • NLM

      Ishibe EI, Soares Junior JN. A CMOS bandgap reference circuit with a temperature coefficient adjustment block. 2013 ;[citado 2025 nov. 15 ]
    • Vancouver

      Ishibe EI, Soares Junior JN. A CMOS bandgap reference circuit with a temperature coefficient adjustment block. 2013 ;[citado 2025 nov. 15 ]

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