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  • Trabalho de evento

    Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K (2023)

    Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der

    Fonte: SBMicro. Nome do evento: Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assuntos: TRANSISTORES, SEMICONDUTORES

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    • ABNT

      PERINA, Welder Fernandes et al. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K. 2023, Anais.. [Piscataway, N.J.]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302604. Acesso em: 08 out. 2025.

    • APA

      Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K. In SBMicro. [Piscataway, N.J.]: IEEE. doi:10.1109/SBMicro60499.2023.10302604

    • NLM

      Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K [Internet]. SBMicro. 2023 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302604

    • Vancouver

      Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K [Internet]. SBMicro. 2023 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302604

  • Artigo de periodico

    Signal to noise ratio in nanoscale bioFETs (2022)

    Mori, Carlos Augusto Bergfeld; Martens, Koen; Simoen, Eddy ; Van Dorpe, Pol; Agopian, Paula Ghedini Der ; Martino, João Antonio

    Fonte: Solid State Electronics. Unidade: EP

    Assuntos: NANOELETRÔNICA, DNA

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      MORI, Carlos Augusto Bergfeld et al. Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108358. Acesso em: 08 out. 2025.

    • APA

      Mori, C. A. B., Martens, K., Simoen, E., Van Dorpe, P., Agopian, P. G. D., & Martino, J. A. (2022). Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108358

    • NLM

      Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2025 out. 08 ] Available from: https://doi.org/10.1016/j.sse.2022.108358

    • Vancouver

      Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2025 out. 08 ] Available from: https://doi.org/10.1016/j.sse.2022.108358

  • Artigo de periodico

    Tunnel-FET evolution and applications for analog circuits (2022)

    Agopian, Paula Ghedini Der ; Martino, João Antonio ; Simoen, Eddy ; Rooyackers, Rita ; Claeys, Cor

    Fonte: Journal of Integrated Circuits and Systems. Unidade: EP

    Assuntos: TRANSISTORES, SENSOR, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS

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      AGOPIAN, Paula Ghedini Der et al. Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, v. 17, n. 2, p. 1-7, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17i2.631. Acesso em: 08 out. 2025.

    • APA

      Agopian, P. G. D., Martino, J. A., Simoen, E., Rooyackers, R., & Claeys, C. (2022). Tunnel-FET evolution and applications for analog circuits. Journal of Integrated Circuits and Systems, 17( 2), 1-7. doi:10.29292/jics.v17i2.631

    • NLM

      Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631

    • Vancouver

      Agopian PGD, Martino JA, Simoen E, Rooyackers R, Claeys C. Tunnel-FET evolution and applications for analog circuits [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 2): 1-7.[citado 2025 out. 08 ] Available from: https://doi.org/10.29292/jics.v17i2.631

  • Trabalho de evento

    Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI (2012)

    Caño de Andrade, Maria Glória ; Martino, João Antonio ; Simoen, Eddy ; Claeys, Cor

    Fonte: Microelectronics technology and devices, SBMicro. Nome do evento: International Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assunto: MICROELETRÔNICA

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      CAÑO DE ANDRADE, Maria Glória et al. Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://doi.org/10.1149/04901.0111ecst. Acesso em: 08 out. 2025.

    • APA

      Caño de Andrade, M. G., Martino, J. A., Simoen, E., & Claeys, C. (2012). Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. doi:10.1149/04901.0111ecst

    • NLM

      Caño de Andrade MG, Martino JA, Simoen E, Claeys C. Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0111ecst

    • Vancouver

      Caño de Andrade MG, Martino JA, Simoen E, Claeys C. Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0111ecst

  • Trabalho de evento

    Spacer length and tilt implantation influence on scaled UTBOX FD MOSFETS (2012)

    Santos, Sara Dereste dos ; Nicoletti, Talitha; Aoulaiche, Marc; Martino, João Antonio ; Veloso, A; Jurczak, Malgorzata; Simoen, Eddy ; Claeys, Cor

    Fonte: Microelectronics technology and devices, SBMicro. Nome do evento: International Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assunto: MICROELETRÔNICA

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    • ABNT

      SANTOS, Sara Dereste dos et al. Spacer length and tilt implantation influence on scaled UTBOX FD MOSFETS. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://repositorio.usp.br/directbitstream/22d2dffe-4364-4c9f-87ae-bbce2402e1e6/3144801.pdf. Acesso em: 08 out. 2025.

    • APA

      Santos, S. D. dos, Nicoletti, T., Aoulaiche, M., Martino, J. A., Veloso, A., Jurczak, M., et al. (2012). Spacer length and tilt implantation influence on scaled UTBOX FD MOSFETS. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. Recuperado de https://repositorio.usp.br/directbitstream/22d2dffe-4364-4c9f-87ae-bbce2402e1e6/3144801.pdf

    • NLM

      Santos SD dos, Nicoletti T, Aoulaiche M, Martino JA, Veloso A, Jurczak M, Simoen E, Claeys C. Spacer length and tilt implantation influence on scaled UTBOX FD MOSFETS [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://repositorio.usp.br/directbitstream/22d2dffe-4364-4c9f-87ae-bbce2402e1e6/3144801.pdf

    • Vancouver

      Santos SD dos, Nicoletti T, Aoulaiche M, Martino JA, Veloso A, Jurczak M, Simoen E, Claeys C. Spacer length and tilt implantation influence on scaled UTBOX FD MOSFETS [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://repositorio.usp.br/directbitstream/22d2dffe-4364-4c9f-87ae-bbce2402e1e6/3144801.pdf

  • Trabalho de evento

    Analysis of the silicon film thickness and the ground plane influence on ultra thin buried oxide SOI nMOSFETs. (2012)

    Itocazu, Vitor Tatsuo ; Sonnenberg, Victor ; Simoen, Eddy ; Claeys, Cor ; Martino, João Antonio

    Fonte: Microelectronics technology and devices, SBMicro. Nome do evento: International Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assunto: MICROELETRÔNICA

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      ITOCAZU, Vitor Tatsuo et al. Analysis of the silicon film thickness and the ground plane influence on ultra thin buried oxide SOI nMOSFETs. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://doi.org/10.1149/04901.0511ecst. Acesso em: 08 out. 2025.

    • APA

      Itocazu, V. T., Sonnenberg, V., Simoen, E., Claeys, C., & Martino, J. A. (2012). Analysis of the silicon film thickness and the ground plane influence on ultra thin buried oxide SOI nMOSFETs. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. doi:10.1149/04901.0511ecst

    • NLM

      Itocazu VT, Sonnenberg V, Simoen E, Claeys C, Martino JA. Analysis of the silicon film thickness and the ground plane influence on ultra thin buried oxide SOI nMOSFETs. [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0511ecst

    • Vancouver

      Itocazu VT, Sonnenberg V, Simoen E, Claeys C, Martino JA. Analysis of the silicon film thickness and the ground plane influence on ultra thin buried oxide SOI nMOSFETs. [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0511ecst

  • Trabalho de evento

    Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs. (2012)

    Bühler, Rudolf Theoderich ; Agopian, Paula Ghedini Der ; Simoen, Eddy ; Claeys, Cor ; Martino, João Antonio

    Fonte: Microelectronics technology and devices, SBMicro. Nome do evento: International Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assunto: MICROELETRÔNICA

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      BÜHLER, Rudolf Theoderich et al. Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://doi.org/10.1149/04901.0145ecst. Acesso em: 08 out. 2025.

    • APA

      Bühler, R. T., Agopian, P. G. D., Simoen, E., Claeys, C., & Martino, J. A. (2012). Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. doi:10.1149/04901.0145ecst

    • NLM

      Bühler RT, Agopian PGD, Simoen E, Claeys C, Martino JA. Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs. [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0145ecst

    • Vancouver

      Bühler RT, Agopian PGD, Simoen E, Claeys C, Martino JA. Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs. [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0145ecst

  • Trabalho de evento

    UTBOX SOI devices with high-k gate dielectric under analog performance (2012)

    Galeti, Milene; Rodrigues, Michele; Aoulaiche, Marc; Collaert, Nadine ; Simoen, Eddy ; Claeys, Cor ; Martino, João Antonio

    Fonte: Microelectronics technology and devices, SBMicro. Nome do evento: International Symposium on Microelectronics Technology and Devices. Unidade: EP

    Assunto: MICROELETRÔNICA

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      GALETI, Milene et al. UTBOX SOI devices with high-k gate dielectric under analog performance. 2012, Anais.. Pennington: Escola Politécnica, Universidade de São Paulo, 2012. Disponível em: https://doi.org/10.1149/04901.0119ecst. Acesso em: 08 out. 2025.

    • APA

      Galeti, M., Rodrigues, M., Aoulaiche, M., Collaert, N., Simoen, E., Claeys, C., & Martino, J. A. (2012). UTBOX SOI devices with high-k gate dielectric under analog performance. In Microelectronics technology and devices, SBMicro. Pennington: Escola Politécnica, Universidade de São Paulo. doi:10.1149/04901.0119ecst

    • NLM

      Galeti M, Rodrigues M, Aoulaiche M, Collaert N, Simoen E, Claeys C, Martino JA. UTBOX SOI devices with high-k gate dielectric under analog performance [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0119ecst

    • Vancouver

      Galeti M, Rodrigues M, Aoulaiche M, Collaert N, Simoen E, Claeys C, Martino JA. UTBOX SOI devices with high-k gate dielectric under analog performance [Internet]. Microelectronics technology and devices, SBMicro. 2012 ;[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/04901.0119ecst

  • Artigo de periodico

    DIBL behavior of triple gate FinFETs with SEG on biaxial strained devices (2010)

    Santos, Sara Dereste dos ; Nicoletti, Talitha; Martino, João Antonio ; Simoen, Eddy ; Claeys, Cor

    Fonte: Microelectronics Technology and Devices - SBMicro 2010. Unidade: EP

    Assunto: DISPOSITIVOS ELETRÔNICOS

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      SANTOS, Sara Dereste dos et al. DIBL behavior of triple gate FinFETs with SEG on biaxial strained devices. Microelectronics Technology and Devices - SBMicro 2010, v. 31, n. 1, p. 51-58, 2010Tradução . . Disponível em: https://doi.org/10.1149/1.3474141. Acesso em: 08 out. 2025.

    • APA

      Santos, S. D. dos, Nicoletti, T., Martino, J. A., Simoen, E., & Claeys, C. (2010). DIBL behavior of triple gate FinFETs with SEG on biaxial strained devices. Microelectronics Technology and Devices - SBMicro 2010, 31( 1), 51-58. doi:10.1149/1.3474141

    • NLM

      Santos SD dos, Nicoletti T, Martino JA, Simoen E, Claeys C. DIBL behavior of triple gate FinFETs with SEG on biaxial strained devices [Internet]. Microelectronics Technology and Devices - SBMicro 2010. 2010 ;31( 1): 51-58.[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/1.3474141

    • Vancouver

      Santos SD dos, Nicoletti T, Martino JA, Simoen E, Claeys C. DIBL behavior of triple gate FinFETs with SEG on biaxial strained devices [Internet]. Microelectronics Technology and Devices - SBMicro 2010. 2010 ;31( 1): 51-58.[citado 2025 out. 08 ] Available from: https://doi.org/10.1149/1.3474141
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1 - 9 (9 registros)

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