Source: Journal of Solid-State Devices and Circuits. Unidade: EP
Assunto: CIRCUITOS INTEGRADOS
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CORRERA, Fatima Salete e ABRAO, T. 2.488 gb / s 1: 4/1:16 demultiplexer : an experience on the design of high-speed digital 'GA''AS' ics. Journal of Solid-State Devices and Circuits, v. 4 , n. ja 1996, p. 24-31, 1996Tradução . . Acesso em: 20 set. 2024.APA
Correra, F. S., & Abrao, T. (1996). 2.488 gb / s 1: 4/1:16 demultiplexer : an experience on the design of high-speed digital 'GA''AS' ics. Journal of Solid-State Devices and Circuits, 4 ( ja 1996), 24-31.NLM
Correra FS, Abrao T. 2.488 gb / s 1: 4/1:16 demultiplexer : an experience on the design of high-speed digital 'GA''AS' ics. Journal of Solid-State Devices and Circuits. 1996 ;4 ( ja 1996): 24-31.[citado 2024 set. 20 ]Vancouver
Correra FS, Abrao T. 2.488 gb / s 1: 4/1:16 demultiplexer : an experience on the design of high-speed digital 'GA''AS' ics. Journal of Solid-State Devices and Circuits. 1996 ;4 ( ja 1996): 24-31.[citado 2024 set. 20 ]